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https://github.com/c64scene-ar/llvm-6502.git
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25 lines
1.1 KiB
LLVM
25 lines
1.1 KiB
LLVM
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;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
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;CHECK: TEX
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;CHECK-NEXT: ALU
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define void @test() {
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%1 = call float @llvm.R600.load.input(i32 0)
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%2 = call float @llvm.R600.load.input(i32 1)
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%3 = call float @llvm.R600.load.input(i32 2)
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%4 = call float @llvm.R600.load.input(i32 3)
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%5 = insertelement <4 x float> undef, float %1, i32 0
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%6 = insertelement <4 x float> %5, float %2, i32 1
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%7 = insertelement <4 x float> %6, float %3, i32 2
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%8 = insertelement <4 x float> %7, float %4, i32 3
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%9 = call <4 x float> @llvm.R600.tex(<4 x float> %8, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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%10 = call <4 x float> @llvm.R600.tex(<4 x float> %8, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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%11 = fadd <4 x float> %9, %10
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call void @llvm.R600.store.swizzle(<4 x float> %11, i32 0, i32 0)
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ret void
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}
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declare float @llvm.R600.load.input(i32) readnone
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declare <4 x float> @llvm.R600.tex(<4 x float>, i32, i32, i32, i32, i32, i32, i32, i32, i32) readnone
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declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
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