2013-04-05 23:31:35 +00:00
|
|
|
;RUN: llc < %s -march=r600 -mcpu=verde | FileCheck %s
|
2013-03-27 09:12:51 +00:00
|
|
|
|
2013-06-03 17:40:11 +00:00
|
|
|
;CHECK: V_MOV_B32_e32 VGPR{{[0-9]+}}, -1431655765
|
|
|
|
|
;CHECK: V_MUL_HI_U32 VGPR0, {{[SV]GPR[0-9]+}}, {{VGPR[0-9]+}}
|
2013-03-27 09:12:59 +00:00
|
|
|
;CHECK-NEXT: V_LSHRREV_B32_e32 VGPR0, 1, VGPR0
|
2013-03-27 09:12:51 +00:00
|
|
|
|
|
|
|
|
define void @test(i32 %p) {
|
|
|
|
|
%i = udiv i32 %p, 3
|
|
|
|
|
%r = bitcast i32 %i to float
|
|
|
|
|
call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %r, float %r, float %r, float %r)
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
declare <4 x float> @llvm.SI.sample.(i32, <4 x i32>, <8 x i32>, <4 x i32>, i32) readnone
|
|
|
|
|
|
|
|
|
|
declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
|
