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llvm-6502/test/MC/Mips/nabi-regs.s

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ELF symbol table field st_other support, excluding visibility bits. Mips specific standalone assembler directive "set at". This directive changes the general purpose register that the assembler will use when given the symbolic register name $at. This does not include negative testing. That will come in a future patch. A side affect of this patch recognizes the different GPR register names for temporaries between old abi and new abi so a test case for that is included. Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175686 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20 23:11:17 +00:00
# OABI (o32, o64) have a different symbolic register
# set for the A and T registers because the NABI allows
# for 4 more register parameters (A registers) offsetting
# the T registers.
#
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding \
[mips] Add explicit N32 and N64 tests to nabi-regs.s test git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201684 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-19 15:30:54 +00:00
# RUN: -mcpu=mips64r2 -arch=mips64 | FileCheck %s
#
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding \
Move the Mips target to storing the ABI in the TargetMachine rather than on MipsSubtargetInfo. This required a bit of massaging in the MC level to handle this since MC is a) largely a collection of disparate classes with no hierarchy, and b) there's no overarching equivalent to the TargetMachine, instead only the subtarget via MCSubtargetInfo (which is the base class of TargetSubtargetInfo). We're now storing the ABI in both the TargetMachine level and in the MC level because the AsmParser and the TargetStreamer both need to know what ABI we have to parse assembly and emit objects. The target streamer has a pointer to the one in the asm parser and is updated when the asm parser is created. This is fragile as the FIXME comment notes, but shouldn't be a problem in practice since we always create an asm parser before attempting to emit object code via the assembler. The TargetMachine now contains the ABI so that the DataLayout can be constructed dependent upon ABI. All testcases have been updated to use the -target-abi command line flag so that we can set the ABI without using a subtarget feature. Should be no change visible externally here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227102 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 17:33:46 +00:00
# RUN: -mcpu=mips64r2 -arch=mips64 -target-abi n32 | FileCheck %s
[mips] Add explicit N32 and N64 tests to nabi-regs.s test git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201684 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-19 15:30:54 +00:00
#
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding \
Move the Mips target to storing the ABI in the TargetMachine rather than on MipsSubtargetInfo. This required a bit of massaging in the MC level to handle this since MC is a) largely a collection of disparate classes with no hierarchy, and b) there's no overarching equivalent to the TargetMachine, instead only the subtarget via MCSubtargetInfo (which is the base class of TargetSubtargetInfo). We're now storing the ABI in both the TargetMachine level and in the MC level because the AsmParser and the TargetStreamer both need to know what ABI we have to parse assembly and emit objects. The target streamer has a pointer to the one in the asm parser and is updated when the asm parser is created. This is fragile as the FIXME comment notes, but shouldn't be a problem in practice since we always create an asm parser before attempting to emit object code via the assembler. The TargetMachine now contains the ABI so that the DataLayout can be constructed dependent upon ABI. All testcases have been updated to use the -target-abi command line flag so that we can set the ABI without using a subtarget feature. Should be no change visible externally here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227102 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 17:33:46 +00:00
# RUN: -mcpu=mips64r2 -arch=mips64 -target-abi n64 | FileCheck %s
ELF symbol table field st_other support, excluding visibility bits. Mips specific standalone assembler directive "set at". This directive changes the general purpose register that the assembler will use when given the symbolic register name $at. This does not include negative testing. That will come in a future patch. A side affect of this patch recognizes the different GPR register names for temporaries between old abi and new abi so a test case for that is included. Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175686 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20 23:11:17 +00:00
.text
foo:
# CHECK: add $16, $16, $4 # encoding: [0x02,0x04,0x80,0x20]
add $s0,$s0,$a0
# CHECK: add $16, $16, $6 # encoding: [0x02,0x06,0x80,0x20]
add $s0,$s0,$a2
# CHECK: add $16, $16, $7 # encoding: [0x02,0x07,0x80,0x20]
add $s0,$s0,$a3
# CHECK: add $16, $16, $8 # encoding: [0x02,0x08,0x80,0x20]
add $s0,$s0,$a4
# CHECK: add $16, $16, $9 # encoding: [0x02,0x09,0x80,0x20]
add $s0,$s0,$a5
# CHECK: add $16, $16, $10 # encoding: [0x02,0x0a,0x80,0x20]
add $s0,$s0,$a6
# CHECK: add $16, $16, $11 # encoding: [0x02,0x0b,0x80,0x20]
add $s0,$s0,$a7
# CHECK: add $16, $16, $12 # encoding: [0x02,0x0c,0x80,0x20]
add $s0,$s0,$t0
# CHECK: add $16, $16, $13 # encoding: [0x02,0x0d,0x80,0x20]
add $s0,$s0,$t1
# CHECK: add $16, $16, $14 # encoding: [0x02,0x0e,0x80,0x20]
add $s0,$s0,$t2
# CHECK: add $16, $16, $15 # encoding: [0x02,0x0f,0x80,0x20]
add $s0,$s0,$t3
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