mirror of
https://github.com/c64scene-ar/llvm-6502.git
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31 lines
1.1 KiB
LLVM
31 lines
1.1 KiB
LLVM
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;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s
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;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
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;CHECK-NOT: s_wqm
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;CHECK: s_mov_b32
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;CHECK-NEXT: v_interp_mov_f32
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;CHECK: v_interp_p1_f32
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;CHECK: v_interp_p2_f32
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define void @main(<16 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>) #0 {
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main_body:
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%5 = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %3)
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%6 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %4)
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%7 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %4)
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %5, float %6, float %7, float %7)
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ret void
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}
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declare void @llvm.AMDGPU.shader.type(i32)
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; Function Attrs: nounwind readnone
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declare float @llvm.SI.fs.constant(i32, i32, i32) #1
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; Function Attrs: nounwind readnone
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declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #1
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declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
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attributes #0 = { "ShaderType"="0" }
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attributes #1 = { nounwind readnone }
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