llvm-6502/test/CodeGen/ARM/2009-04-09-RegScavengerAsm.ll

; RUN: llc < %s -march=arm
; PR3954

define void @foo(...) nounwind {
entry:
	%rr = alloca i32		; <i32*> [#uses=2]
	%0 = load i32* %rr		; <i32> [#uses=1]
	%1 = call i32 asm "nop", "=r,0"(i32 %0) nounwind		; <i32> [#uses=1]
	store i32 %1, i32* %rr
	br label %return

return:		; preds = %entry
	ret void
}
Eliminate more uses of llvm-as and llvm-dis. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81293 91177308-0d34-0410-b5e6-96231b3b80d8 2009-09-09 00:09:15 +00:00			`; RUN: llc < %s -march=arm`
Fix pr3954. The register scavenger asserts for inline assembly with register destinations that are tied to source operands. The TargetInstrDescr::findTiedToSrcOperand method silently fails for inline assembly. The existing MachineInstr::isRegReDefinedByTwoAddr was very close to doing what is needed, so this revision makes a few changes to that method and also renames it to isRegTiedToUseOperand (for consistency with the very similar isRegTiedToDefOperand and because it handles both two-address instructions and inline assembly with tied registers). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68714 91177308-0d34-0410-b5e6-96231b3b80d8 2009-04-09 17:16:43 +00:00			`; PR3954`

			`define void @foo(...) nounwind {`
			`entry:`
			`%rr = alloca i32 ; <i32*> [#uses=2]`
			`%0 = load i32* %rr ; <i32> [#uses=1]`
			`%1 = call i32 asm "nop", "=r,0"(i32 %0) nounwind ; <i32> [#uses=1]`
			`store i32 %1, i32* %rr`
			`br label %return`

			`return: ; preds = %entry`
			`ret void`
			`}`