llvm-6502/test/CodeGen/ARM/neon_arith1.ll

; RUN: llc < %s -march=arm -mattr=+neon | grep vadd

define <8 x i8> @t_i8x8(<8 x i8> %a, <8 x i8> %b) nounwind {
entry:
	%0 = add <8 x i8> %a, %b
	ret <8 x i8> %0
}
Eliminate more uses of llvm-as and llvm-dis. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81293 91177308-0d34-0410-b5e6-96231b3b80d8 2009-09-09 00:09:15 +00:00			`; RUN: llc < %s -march=arm -mattr=+neon \| grep vadd`
Add support for ARM's Advanced SIMD (NEON) instruction set. This is still a work in progress but most of the NEON instruction set is supported. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73919 91177308-0d34-0410-b5e6-96231b3b80d8 2009-06-22 23:27:02 +00:00
			`define <8 x i8> @t_i8x8(<8 x i8> %a, <8 x i8> %b) nounwind {`
			`entry:`
			`%0 = add <8 x i8> %a, %b`
			`ret <8 x i8> %0`
			`}`