mirror of
https://github.com/c64scene-ar/llvm-6502.git
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47 lines
2.2 KiB
LLVM
47 lines
2.2 KiB
LLVM
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; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s --check-prefix=SM20
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; RUN: llc < %s -march=nvptx -mcpu=sm_30 | FileCheck %s --check-prefix=SM30
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target triple = "nvptx-unknown-cuda"
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declare { float, float, float, float } @llvm.nvvm.tex.unified.1d.v4f32.s32(i64, i32)
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declare i64 @llvm.nvvm.texsurf.handle.internal.p1i64(i64 addrspace(1)*)
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; SM20-LABEL: .entry foo
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; SM30-LABEL: .entry foo
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define void @foo(i64 %img, float* %red, i32 %idx) {
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; SM20: ld.param.u64 %rd[[TEXREG:[0-9]+]], [foo_param_0];
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; SM20: tex.1d.v4.f32.s32 {%f[[RED:[0-9]+]], %f[[GREEN:[0-9]+]], %f[[BLUE:[0-9]+]], %f[[ALPHA:[0-9]+]]}, [%rd[[TEXREG]], {%r{{[0-9]+}}}]
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; SM30: ld.param.u64 %rd[[TEXREG:[0-9]+]], [foo_param_0];
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; SM30: tex.1d.v4.f32.s32 {%f[[RED:[0-9]+]], %f[[GREEN:[0-9]+]], %f[[BLUE:[0-9]+]], %f[[ALPHA:[0-9]+]]}, [%rd[[TEXREG]], {%r{{[0-9]+}}}]
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%val = tail call { float, float, float, float } @llvm.nvvm.tex.unified.1d.v4f32.s32(i64 %img, i32 %idx)
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%ret = extractvalue { float, float, float, float } %val, 0
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; SM20: st.f32 [%r{{[0-9]+}}], %f[[RED]]
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; SM30: st.f32 [%r{{[0-9]+}}], %f[[RED]]
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store float %ret, float* %red
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ret void
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}
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@tex0 = internal addrspace(1) global i64 0, align 8
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; SM20-LABEL: .entry bar
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; SM30-LABEL: .entry bar
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define void @bar(float* %red, i32 %idx) {
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; SM30: mov.u64 %rd[[TEXHANDLE:[0-9]+]], tex0
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%texHandle = tail call i64 @llvm.nvvm.texsurf.handle.internal.p1i64(i64 addrspace(1)* @tex0)
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; SM20: tex.1d.v4.f32.s32 {%f[[RED:[0-9]+]], %f[[GREEN:[0-9]+]], %f[[BLUE:[0-9]+]], %f[[ALPHA:[0-9]+]]}, [tex0, {%r{{[0-9]+}}}]
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; SM30: tex.1d.v4.f32.s32 {%f[[RED:[0-9]+]], %f[[GREEN:[0-9]+]], %f[[BLUE:[0-9]+]], %f[[ALPHA:[0-9]+]]}, [%rd[[TEXHANDLE]], {%r{{[0-9]+}}}]
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%val = tail call { float, float, float, float } @llvm.nvvm.tex.unified.1d.v4f32.s32(i64 %texHandle, i32 %idx)
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%ret = extractvalue { float, float, float, float } %val, 0
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; SM20: st.f32 [%r{{[0-9]+}}], %f[[RED]]
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; SM30: st.f32 [%r{{[0-9]+}}], %f[[RED]]
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store float %ret, float* %red
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ret void
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}
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!nvvm.annotations = !{!1, !2, !3}
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!1 = metadata !{void (i64, float*, i32)* @foo, metadata !"kernel", i32 1}
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!2 = metadata !{void (float*, i32)* @bar, metadata !"kernel", i32 1}
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!3 = metadata !{i64 addrspace(1)* @tex0, metadata !"texture", i32 1}
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