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llvm-6502/test/Transforms/ScalarRepl/vector_promote.ll

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filecheckize git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112695 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-01 05:10:14 +00:00
; RUN: opt < %s -scalarrepl -S | FileCheck %s
Make opt default to not adding a target data string and update tests that depend on target data to supply it within the test git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85900 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 15:29:06 +00:00
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
deepen my MMX/SRoA hack to avoid hurting non-x86 codegen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112763 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-01 23:09:27 +00:00
target triple = "x86_64-apple-darwin10.0.0"
New testcase, checking to see we can turn this code: void test(vector float *F, float f) { vector float G = *F + *F; *((float*)&G) = f; *F = G + G; } void test2(vector float *F, float f) { vector float G = *F + *F; ((float*)&G)[2] = f; *F = G + G; } void test3(vector float *F, float *f) { vector float G = *F + *F; *f = ((float*)&G)[2]; } void test4(vector float *F, float *f) { vector float G = *F + *F; *f = *((float*)&G); } into insert/extract element operations with no memory traffic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27709 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14 21:41:54 +00:00
filecheckize git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112695 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-01 05:10:14 +00:00
define void @test1(<4 x float>* %F, float %f) {
New testcase, checking to see we can turn this code: void test(vector float *F, float f) { vector float G = *F + *F; *((float*)&G) = f; *F = G + G; } void test2(vector float *F, float f) { vector float G = *F + *F; ((float*)&G)[2] = f; *F = G + G; } void test3(vector float *F, float *f) { vector float G = *F + *F; *f = ((float*)&G)[2]; } void test4(vector float *F, float *f) { vector float G = *F + *F; *f = *((float*)&G); } into insert/extract element operations with no memory traffic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27709 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14 21:41:54 +00:00
entry:
Upgrade tests to not use llvm-upgrade. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48484 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18 04:14:37 +00:00
%G = alloca <4 x float>, align 16 ; <<4 x float>*> [#uses=3]
%tmp = load <4 x float>* %F ; <<4 x float>> [#uses=2]
Split the Add, Sub, and Mul instruction opcodes into separate integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 22:49:04 +00:00
%tmp3 = fadd <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1]
Upgrade tests to not use llvm-upgrade. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48484 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18 04:14:37 +00:00
store <4 x float> %tmp3, <4 x float>* %G
%G.upgrd.1 = getelementptr <4 x float>* %G, i32 0, i32 0 ; <float*> [#uses=1]
store float %f, float* %G.upgrd.1
%tmp4 = load <4 x float>* %G ; <<4 x float>> [#uses=2]
Split the Add, Sub, and Mul instruction opcodes into separate integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 22:49:04 +00:00
%tmp6 = fadd <4 x float> %tmp4, %tmp4 ; <<4 x float>> [#uses=1]
Upgrade tests to not use llvm-upgrade. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48484 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18 04:14:37 +00:00
store <4 x float> %tmp6, <4 x float>* %F
ret void
Update Transforms tests to use CHECK-LABEL for easier debugging. No functionality change. This update was done with the following bash script: find test/Transforms -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_]*\):\( *\)@$FUNC\([( ]*\)\$/;\1\2-LABEL:\3@$FUNC(/g" $TEMP done mv $TEMP $NAME fi done git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186268 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-14 01:42:54 +00:00
; CHECK-LABEL: @test1(
filecheckize git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112695 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-01 05:10:14 +00:00
; CHECK-NOT: alloca
; CHECK: %tmp = load <4 x float>* %F
; CHECK: fadd <4 x float> %tmp, %tmp
; CHECK-NEXT: insertelement <4 x float> %tmp3, float %f, i32 0
New testcase, checking to see we can turn this code: void test(vector float *F, float f) { vector float G = *F + *F; *((float*)&G) = f; *F = G + G; } void test2(vector float *F, float f) { vector float G = *F + *F; ((float*)&G)[2] = f; *F = G + G; } void test3(vector float *F, float *f) { vector float G = *F + *F; *f = ((float*)&G)[2]; } void test4(vector float *F, float *f) { vector float G = *F + *F; *f = *((float*)&G); } into insert/extract element operations with no memory traffic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27709 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14 21:41:54 +00:00
}
Upgrade tests to not use llvm-upgrade. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48484 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18 04:14:37 +00:00
define void @test2(<4 x float>* %F, float %f) {
New testcase, checking to see we can turn this code: void test(vector float *F, float f) { vector float G = *F + *F; *((float*)&G) = f; *F = G + G; } void test2(vector float *F, float f) { vector float G = *F + *F; ((float*)&G)[2] = f; *F = G + G; } void test3(vector float *F, float *f) { vector float G = *F + *F; *f = ((float*)&G)[2]; } void test4(vector float *F, float *f) { vector float G = *F + *F; *f = *((float*)&G); } into insert/extract element operations with no memory traffic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27709 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14 21:41:54 +00:00
entry:
Upgrade tests to not use llvm-upgrade. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48484 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18 04:14:37 +00:00
%G = alloca <4 x float>, align 16 ; <<4 x float>*> [#uses=3]
%tmp = load <4 x float>* %F ; <<4 x float>> [#uses=2]
Split the Add, Sub, and Mul instruction opcodes into separate integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 22:49:04 +00:00
%tmp3 = fadd <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1]
Upgrade tests to not use llvm-upgrade. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48484 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18 04:14:37 +00:00
store <4 x float> %tmp3, <4 x float>* %G
%tmp.upgrd.2 = getelementptr <4 x float>* %G, i32 0, i32 2 ; <float*> [#uses=1]
store float %f, float* %tmp.upgrd.2
%tmp4 = load <4 x float>* %G ; <<4 x float>> [#uses=2]
Split the Add, Sub, and Mul instruction opcodes into separate integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 22:49:04 +00:00
%tmp6 = fadd <4 x float> %tmp4, %tmp4 ; <<4 x float>> [#uses=1]
Upgrade tests to not use llvm-upgrade. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48484 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18 04:14:37 +00:00
store <4 x float> %tmp6, <4 x float>* %F
ret void
Update Transforms tests to use CHECK-LABEL for easier debugging. No functionality change. This update was done with the following bash script: find test/Transforms -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_]*\):\( *\)@$FUNC\([( ]*\)\$/;\1\2-LABEL:\3@$FUNC(/g" $TEMP done mv $TEMP $NAME fi done git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186268 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-14 01:42:54 +00:00
; CHECK-LABEL: @test2(
filecheckize git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112695 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-01 05:10:14 +00:00
; CHECK-NOT: alloca
; CHECK: %tmp = load <4 x float>* %F
; CHECK: fadd <4 x float> %tmp, %tmp
; CHECK-NEXT: insertelement <4 x float> %tmp3, float %f, i32 2
New testcase, checking to see we can turn this code: void test(vector float *F, float f) { vector float G = *F + *F; *((float*)&G) = f; *F = G + G; } void test2(vector float *F, float f) { vector float G = *F + *F; ((float*)&G)[2] = f; *F = G + G; } void test3(vector float *F, float *f) { vector float G = *F + *F; *f = ((float*)&G)[2]; } void test4(vector float *F, float *f) { vector float G = *F + *F; *f = *((float*)&G); } into insert/extract element operations with no memory traffic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27709 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14 21:41:54 +00:00
}
Upgrade tests to not use llvm-upgrade. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48484 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18 04:14:37 +00:00
define void @test3(<4 x float>* %F, float* %f) {
New testcase, checking to see we can turn this code: void test(vector float *F, float f) { vector float G = *F + *F; *((float*)&G) = f; *F = G + G; } void test2(vector float *F, float f) { vector float G = *F + *F; ((float*)&G)[2] = f; *F = G + G; } void test3(vector float *F, float *f) { vector float G = *F + *F; *f = ((float*)&G)[2]; } void test4(vector float *F, float *f) { vector float G = *F + *F; *f = *((float*)&G); } into insert/extract element operations with no memory traffic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27709 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14 21:41:54 +00:00
entry:
Upgrade tests to not use llvm-upgrade. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48484 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18 04:14:37 +00:00
%G = alloca <4 x float>, align 16 ; <<4 x float>*> [#uses=2]
%tmp = load <4 x float>* %F ; <<4 x float>> [#uses=2]
Split the Add, Sub, and Mul instruction opcodes into separate integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 22:49:04 +00:00
%tmp3 = fadd <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1]
Upgrade tests to not use llvm-upgrade. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48484 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18 04:14:37 +00:00
store <4 x float> %tmp3, <4 x float>* %G
%tmp.upgrd.3 = getelementptr <4 x float>* %G, i32 0, i32 2 ; <float*> [#uses=1]
%tmp.upgrd.4 = load float* %tmp.upgrd.3 ; <float> [#uses=1]
store float %tmp.upgrd.4, float* %f
ret void
Update Transforms tests to use CHECK-LABEL for easier debugging. No functionality change. This update was done with the following bash script: find test/Transforms -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_]*\):\( *\)@$FUNC\([( ]*\)\$/;\1\2-LABEL:\3@$FUNC(/g" $TEMP done mv $TEMP $NAME fi done git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186268 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-14 01:42:54 +00:00
; CHECK-LABEL: @test3(
filecheckize git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112695 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-01 05:10:14 +00:00
; CHECK-NOT: alloca
; CHECK: %tmp = load <4 x float>* %F
; CHECK: fadd <4 x float> %tmp, %tmp
; CHECK-NEXT: extractelement <4 x float> %tmp3, i32 2
New testcase, checking to see we can turn this code: void test(vector float *F, float f) { vector float G = *F + *F; *((float*)&G) = f; *F = G + G; } void test2(vector float *F, float f) { vector float G = *F + *F; ((float*)&G)[2] = f; *F = G + G; } void test3(vector float *F, float *f) { vector float G = *F + *F; *f = ((float*)&G)[2]; } void test4(vector float *F, float *f) { vector float G = *F + *F; *f = *((float*)&G); } into insert/extract element operations with no memory traffic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27709 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14 21:41:54 +00:00
}
Upgrade tests to not use llvm-upgrade. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48484 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18 04:14:37 +00:00
define void @test4(<4 x float>* %F, float* %f) {
New testcase, checking to see we can turn this code: void test(vector float *F, float f) { vector float G = *F + *F; *((float*)&G) = f; *F = G + G; } void test2(vector float *F, float f) { vector float G = *F + *F; ((float*)&G)[2] = f; *F = G + G; } void test3(vector float *F, float *f) { vector float G = *F + *F; *f = ((float*)&G)[2]; } void test4(vector float *F, float *f) { vector float G = *F + *F; *f = *((float*)&G); } into insert/extract element operations with no memory traffic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27709 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14 21:41:54 +00:00
entry:
Upgrade tests to not use llvm-upgrade. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48484 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18 04:14:37 +00:00
%G = alloca <4 x float>, align 16 ; <<4 x float>*> [#uses=2]
%tmp = load <4 x float>* %F ; <<4 x float>> [#uses=2]
Split the Add, Sub, and Mul instruction opcodes into separate integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 22:49:04 +00:00
%tmp3 = fadd <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1]
Upgrade tests to not use llvm-upgrade. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48484 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18 04:14:37 +00:00
store <4 x float> %tmp3, <4 x float>* %G
%G.upgrd.5 = getelementptr <4 x float>* %G, i32 0, i32 0 ; <float*> [#uses=1]
%tmp.upgrd.6 = load float* %G.upgrd.5 ; <float> [#uses=1]
store float %tmp.upgrd.6, float* %f
ret void
Update Transforms tests to use CHECK-LABEL for easier debugging. No functionality change. This update was done with the following bash script: find test/Transforms -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_]*\):\( *\)@$FUNC\([( ]*\)\$/;\1\2-LABEL:\3@$FUNC(/g" $TEMP done mv $TEMP $NAME fi done git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186268 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-14 01:42:54 +00:00
; CHECK-LABEL: @test4(
filecheckize git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112695 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-01 05:10:14 +00:00
; CHECK-NOT: alloca
; CHECK: %tmp = load <4 x float>* %F
; CHECK: fadd <4 x float> %tmp, %tmp
; CHECK-NEXT: extractelement <4 x float> %tmp3, i32 0
New testcase, checking to see we can turn this code: void test(vector float *F, float f) { vector float G = *F + *F; *((float*)&G) = f; *F = G + G; } void test2(vector float *F, float f) { vector float G = *F + *F; ((float*)&G)[2] = f; *F = G + G; } void test3(vector float *F, float *f) { vector float G = *F + *F; *f = ((float*)&G)[2]; } void test4(vector float *F, float *f) { vector float G = *F + *F; *f = *((float*)&G); } into insert/extract element operations with no memory traffic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27709 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14 21:41:54 +00:00
}
rearrange how SRoA handles promotion of allocas to vectors. With the new world order, it can handle cases where the first store into the alloca is an element of the vector, instead of requiring the first analyzed store to have the vector type itself. This allows us to un-xfail test/CodeGen/X86/vec_ins_extract.ll. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63590 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-03 01:30:09 +00:00
define i32 @test5(float %X) { ;; should turn into bitcast.
%X_addr = alloca [4 x float]
%X1 = getelementptr [4 x float]* %X_addr, i32 0, i32 2
store float %X, float* %X1
%a = bitcast float* %X1 to i32*
%tmp = load i32* %a
ret i32 %tmp
Update Transforms tests to use CHECK-LABEL for easier debugging. No functionality change. This update was done with the following bash script: find test/Transforms -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_]*\):\( *\)@$FUNC\([( ]*\)\$/;\1\2-LABEL:\3@$FUNC(/g" $TEMP done mv $TEMP $NAME fi done git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186268 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-14 01:42:54 +00:00
; CHECK-LABEL: @test5(
filecheckize git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112695 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-01 05:10:14 +00:00
; CHECK-NEXT: bitcast float %X to i32
; CHECK-NEXT: ret i32
rearrange how SRoA handles promotion of allocas to vectors. With the new world order, it can handle cases where the first store into the alloca is an element of the vector, instead of requiring the first analyzed store to have the vector type itself. This allows us to un-xfail test/CodeGen/X86/vec_ins_extract.ll. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63590 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-03 01:30:09 +00:00
}
add a gross hack to work around a problem that Argiris reported on llvmdev: SRoA is introducing MMX datatypes like <1 x i64>, which then cause random problems because the X86 backend is producing mmx stuff without inserting proper emms calls. In the short term, force off MMX datatypes. In the long term, the X86 backend should not select generic vector types to MMX registers. This is being worked on, but won't be done in time for 2.8. rdar://8380055 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112696 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-01 05:14:33 +00:00
define i64 @test6(<2 x float> %X) {
%X_addr = alloca <2 x float>
store <2 x float> %X, <2 x float>* %X_addr
%P = bitcast <2 x float>* %X_addr to i64*
%tmp = load i64* %P
ret i64 %tmp
Update Transforms tests to use CHECK-LABEL for easier debugging. No functionality change. This update was done with the following bash script: find test/Transforms -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_]*\):\( *\)@$FUNC\([( ]*\)\$/;\1\2-LABEL:\3@$FUNC(/g" $TEMP done mv $TEMP $NAME fi done git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186268 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-14 01:42:54 +00:00
; CHECK-LABEL: @test6(
Do some simple copy propagation through integer loads and stores when promoting vector types. This helps a lot with inlined functions when using the ARM soft float ABI. Fixes <rdar://problem/9184212>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128453 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-29 05:19:52 +00:00
; CHECK: bitcast <2 x float> %X to i64
remove an old hack that avoided creating MMX datatypes. The X86 backend has been fixed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124064 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-23 06:40:33 +00:00
; CHECK: ret i64
add a gross hack to work around a problem that Argiris reported on llvmdev: SRoA is introducing MMX datatypes like <1 x i64>, which then cause random problems because the X86 backend is producing mmx stuff without inserting proper emms calls. In the short term, force off MMX datatypes. In the long term, the X86 backend should not select generic vector types to MMX registers. This is being worked on, but won't be done in time for 2.8. rdar://8380055 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112696 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-01 05:14:33 +00:00
}
Add a test for PR10565. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141647 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 06:10:37 +00:00
%struct.test7 = type { [6 x i32] }
define void @test7() {
entry:
%memtmp = alloca %struct.test7, align 16
%0 = bitcast %struct.test7* %memtmp to <4 x i32>*
store <4 x i32> zeroinitializer, <4 x i32>* %0, align 16
%1 = getelementptr inbounds %struct.test7* %memtmp, i64 0, i32 0, i64 5
store i32 0, i32* %1, align 4
ret void
Update Transforms tests to use CHECK-LABEL for easier debugging. No functionality change. This update was done with the following bash script: find test/Transforms -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_]*\):\( *\)@$FUNC\([( ]*\)\$/;\1\2-LABEL:\3@$FUNC(/g" $TEMP done mv $TEMP $NAME fi done git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186268 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-14 01:42:54 +00:00
; CHECK-LABEL: @test7(
Add a test for PR10565. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141647 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 06:10:37 +00:00
; CHECK-NOT: alloca
; CHECK: and i192
}
Fix SROA to avoid unnecessary scalar conversions for 1-element vectors. When a 1-element vector alloca is promoted, a store instruction can often be rewritten without converting the value to a scalar and using an insertelement instruction to stuff it into the new alloca. This patch just adds a check to skip that conversion when it is unnecessary. This turns out to be really important for some ARM Neon operations where <1 x i64> is used to get around the fact that i64 is not a legal type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184870 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 19:09:50 +00:00
; When promoting an alloca to a 1-element vector type, instructions that
; produce that same vector type should not be changed to insert one element
; into a new vector. <rdar://problem/14249078>
define <1 x i64> @test8(<1 x i64> %a) {
entry:
%a.addr = alloca <1 x i64>, align 8
%__a = alloca <1 x i64>, align 8
%tmp = alloca <1 x i64>, align 8
store <1 x i64> %a, <1 x i64>* %a.addr, align 8
%0 = load <1 x i64>* %a.addr, align 8
store <1 x i64> %0, <1 x i64>* %__a, align 8
%1 = load <1 x i64>* %__a, align 8
%2 = bitcast <1 x i64> %1 to <8 x i8>
%3 = bitcast <8 x i8> %2 to <1 x i64>
%vshl_n = shl <1 x i64> %3, <i64 4>
store <1 x i64> %vshl_n, <1 x i64>* %tmp
%4 = load <1 x i64>* %tmp
ret <1 x i64> %4
Update Transforms tests to use CHECK-LABEL for easier debugging. No functionality change. This update was done with the following bash script: find test/Transforms -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_]*\):\( *\)@$FUNC\([( ]*\)\$/;\1\2-LABEL:\3@$FUNC(/g" $TEMP done mv $TEMP $NAME fi done git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186268 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-14 01:42:54 +00:00
; CHECK-LABEL: @test8(
Fix SROA to avoid unnecessary scalar conversions for 1-element vectors. When a 1-element vector alloca is promoted, a store instruction can often be rewritten without converting the value to a scalar and using an insertelement instruction to stuff it into the new alloca. This patch just adds a check to skip that conversion when it is unnecessary. This turns out to be really important for some ARM Neon operations where <1 x i64> is used to get around the fact that i64 is not a legal type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184870 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 19:09:50 +00:00
; CHECK-NOT: alloca
; CHECK-NOT: insertelement
; CHECK: ret <1 x i64>
}
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