llvm-6502/test/CodeGen/ARM/2007-01-31-RegInfoAssert.ll

; RUN: llvm-as < %s | llc -mtriple=thumb-apple-darwin

%struct.rtx_def = type { i8 }
@str = external global [7 x i8]

define void @f1() {
	%D = alloca %struct.rtx_def, align 1
	%tmp1 = bitcast %struct.rtx_def* %D to i32*
	%tmp7 = load i32* %tmp1
	%tmp14 = lshr i32 %tmp7, 1
	%tmp1415 = and i32 %tmp14, 1
	call void (i32, ...)* @printf( i32 undef, i32 0, i32 %tmp1415 )
	ret void
}

declare void @printf(i32, ...)
-march=arm -enable-thumb => -march=thumb git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34522 91177308-0d34-0410-b5e6-96231b3b80d8 2007-02-23 03:15:39 +00:00			`; RUN: llvm-as < %s \| llc -mtriple=thumb-apple-darwin`
Add a test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33742 91177308-0d34-0410-b5e6-96231b3b80d8 2007-02-01 02:27:24 +00:00
			`%struct.rtx_def = type { i8 }`
			`@str = external global [7 x i8]`

			`define void @f1() {`
			`%D = alloca %struct.rtx_def, align 1`
			`%tmp1 = bitcast %struct.rtx_def* %D to i32*`
			`%tmp7 = load i32* %tmp1`
Changes to support making the shift instructions be true BinaryOperators. This feature is needed in order to support shifts of more than 255 bits on large integer types. This changes the syntax for llvm assembly to make shl, ashr and lshr instructions look like a binary operator: shl i32 %X, 1 instead of shl i32 %X, i8 1 Additionally, this should help a few passes perform additional optimizations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33776 91177308-0d34-0410-b5e6-96231b3b80d8 2007-02-02 02:16:23 +00:00			`%tmp14 = lshr i32 %tmp7, 1`
Add a test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33742 91177308-0d34-0410-b5e6-96231b3b80d8 2007-02-01 02:27:24 +00:00			`%tmp1415 = and i32 %tmp14, 1`
			`call void (i32, ...)* @printf( i32 undef, i32 0, i32 %tmp1415 )`
			`ret void`
			`}`

			`declare void @printf(i32, ...)`