llvm-6502/test/MC/Disassembler/ARM/invalid-LDR_POST-arm.txt

# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
# XFAIL: *

# LDR_PRE/POST has encoding Inst{4} = 0.
0xde 0x69 0x18 0x46
Check invalid register encodings for LdFrm/StFrm ARM instructions and flag them as invalid instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129286 91177308-0d34-0410-b5e6-96231b3b80d8 2011-04-11 18:34:12 +00:00			`# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 \|& grep {invalid instruction encoding}`
Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter. This new disassembler can correctly decode all the testcases that the old one did, though some "expected failure" testcases are XFAIL'd for now because it is not (yet) as strict in operand checking as the old one was. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137144 91177308-0d34-0410-b5e6-96231b3b80d8 2011-08-09 20:55:18 +00:00			`# XFAIL: *`
Check invalid register encodings for LdFrm/StFrm ARM instructions and flag them as invalid instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129286 91177308-0d34-0410-b5e6-96231b3b80d8 2011-04-11 18:34:12 +00:00
			`# LDR_PRE/POST has encoding Inst{4} = 0.`
			`0xde 0x69 0x18 0x46`