2008-05-14 10:17:11 +00:00
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//==-llvm/CodeGen/DAGISelHeader.h - Common DAG ISel definitions -*- C++ -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides definitions of the common, target-independent methods and
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// data, which is used by SelectionDAG-based instruction selectors.
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//
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// *** NOTE: This file is #included into the middle of the target
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2008-10-28 18:47:37 +00:00
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// instruction selector class. These functions are really methods.
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// This is a little awkward, but it allows this code to be shared
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// by all the targets while still being able to call into
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// target-specific code without using a virtual function call.
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//
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2008-05-14 10:17:11 +00:00
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_DAGISEL_HEADER_H
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#define LLVM_CODEGEN_DAGISEL_HEADER_H
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Eliminate the ISel priority queue, which used the topological order for a
priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.
The impact on most targets is that AddToISelQueue calls can be simply removed.
In the x86 target, there are two additional notable changes.
The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.
Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05 04:14:16 +00:00
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/// ISelPosition - Node iterator marking the current position of
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/// instruction selection as it procedes through the topologically-sorted
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/// node list.
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SelectionDAG::allnodes_iterator ISelPosition;
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2008-05-14 10:17:11 +00:00
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/// IsChainCompatible - Returns true if Chain is Op or Chain does
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/// not reach Op.
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static bool IsChainCompatible(SDNode *Chain, SDNode *Op) {
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if (Chain->getOpcode() == ISD::EntryToken)
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return true;
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else if (Chain->getOpcode() == ISD::TokenFactor)
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return false;
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else if (Chain->getNumOperands() > 0) {
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2008-07-27 21:46:04 +00:00
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SDValue C0 = Chain->getOperand(0);
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2008-05-14 10:17:11 +00:00
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if (C0.getValueType() == MVT::Other)
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2008-08-28 21:40:38 +00:00
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return C0.getNode() != Op && IsChainCompatible(C0.getNode(), Op);
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2008-05-14 10:17:11 +00:00
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}
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return true;
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}
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Eliminate the ISel priority queue, which used the topological order for a
priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.
The impact on most targets is that AddToISelQueue calls can be simply removed.
In the x86 target, there are two additional notable changes.
The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.
Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05 04:14:16 +00:00
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/// ISelUpdater - helper class to handle updates of the
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/// instruciton selection graph.
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class VISIBILITY_HIDDEN ISelUpdater : public SelectionDAG::DAGUpdateListener {
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SelectionDAG::allnodes_iterator &ISelPosition;
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bool HadDelete; // Indicate if any deletions were done.
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public:
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explicit ISelUpdater(SelectionDAG::allnodes_iterator &isp)
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: ISelPosition(isp) {}
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/// NodeDeleted - remove node from the selection queue.
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virtual void NodeDeleted(SDNode *N, SDNode *E) {
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if (ISelPosition == SelectionDAG::allnodes_iterator(N))
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++ISelPosition;
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2008-05-14 10:17:11 +00:00
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}
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Eliminate the ISel priority queue, which used the topological order for a
priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.
The impact on most targets is that AddToISelQueue calls can be simply removed.
In the x86 target, there are two additional notable changes.
The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.
Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05 04:14:16 +00:00
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/// NodeUpdated - Ignore updates for now.
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virtual void NodeUpdated(SDNode *N) {}
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};
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2008-05-14 10:17:11 +00:00
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/// ReplaceUses - replace all uses of the old node F with the use
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/// of the new node T.
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2008-07-27 21:46:04 +00:00
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void ReplaceUses(SDValue F, SDValue T) DISABLE_INLINE {
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Eliminate the ISel priority queue, which used the topological order for a
priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.
The impact on most targets is that AddToISelQueue calls can be simply removed.
In the x86 target, there are two additional notable changes.
The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.
Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05 04:14:16 +00:00
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ISelUpdater ISU(ISelPosition);
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CurDAG->ReplaceAllUsesOfValueWith(F, T, &ISU);
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2008-05-14 10:17:11 +00:00
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}
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2008-07-17 19:10:17 +00:00
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/// ReplaceUses - replace all uses of the old nodes F with the use
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/// of the new nodes T.
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2008-07-27 21:46:04 +00:00
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void ReplaceUses(const SDValue *F, const SDValue *T,
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2008-07-17 19:10:17 +00:00
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unsigned Num) DISABLE_INLINE {
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Eliminate the ISel priority queue, which used the topological order for a
priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.
The impact on most targets is that AddToISelQueue calls can be simply removed.
In the x86 target, there are two additional notable changes.
The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.
Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05 04:14:16 +00:00
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ISelUpdater ISU(ISelPosition);
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CurDAG->ReplaceAllUsesOfValuesWith(F, T, Num, &ISU);
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2008-07-17 19:10:17 +00:00
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}
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2008-05-14 10:17:11 +00:00
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/// ReplaceUses - replace all uses of the old node F with the use
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/// of the new node T.
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void ReplaceUses(SDNode *F, SDNode *T) DISABLE_INLINE {
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unsigned FNumVals = F->getNumValues();
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unsigned TNumVals = T->getNumValues();
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Eliminate the ISel priority queue, which used the topological order for a
priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.
The impact on most targets is that AddToISelQueue calls can be simply removed.
In the x86 target, there are two additional notable changes.
The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.
Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05 04:14:16 +00:00
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ISelUpdater ISU(ISelPosition);
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2008-05-14 10:17:11 +00:00
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if (FNumVals != TNumVals) {
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for (unsigned i = 0, e = std::min(FNumVals, TNumVals); i < e; ++i)
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Eliminate the ISel priority queue, which used the topological order for a
priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.
The impact on most targets is that AddToISelQueue calls can be simply removed.
In the x86 target, there are two additional notable changes.
The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.
Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05 04:14:16 +00:00
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CurDAG->ReplaceAllUsesOfValueWith(SDValue(F, i), SDValue(T, i), &ISU);
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2008-05-14 10:17:11 +00:00
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} else {
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Eliminate the ISel priority queue, which used the topological order for a
priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.
The impact on most targets is that AddToISelQueue calls can be simply removed.
In the x86 target, there are two additional notable changes.
The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.
Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05 04:14:16 +00:00
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CurDAG->ReplaceAllUsesWith(F, T, &ISU);
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2008-05-14 10:17:11 +00:00
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}
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}
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/// SelectRoot - Top level entry to DAG instruction selector.
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/// Selects instructions starting at the root of the current DAG.
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2008-10-27 21:56:29 +00:00
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void SelectRoot(SelectionDAG &DAG) {
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2008-05-14 10:17:11 +00:00
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SelectRootInit();
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// Create a dummy node (which is not added to allnodes), that adds
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// a reference to the root node, preventing it from being deleted,
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// and tracking any changes of the root.
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HandleSDNode Dummy(CurDAG->getRoot());
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Eliminate the ISel priority queue, which used the topological order for a
priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.
The impact on most targets is that AddToISelQueue calls can be simply removed.
In the x86 target, there are two additional notable changes.
The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.
Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05 04:14:16 +00:00
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ISelPosition = next(SelectionDAG::allnodes_iterator(CurDAG->getRoot().getNode()));
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2008-05-14 10:17:11 +00:00
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// Select pending nodes from the instruction selection queue
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// until no more nodes are left for selection.
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Eliminate the ISel priority queue, which used the topological order for a
priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.
The impact on most targets is that AddToISelQueue calls can be simply removed.
In the x86 target, there are two additional notable changes.
The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.
Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05 04:14:16 +00:00
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while (ISelPosition != CurDAG->allnodes_begin()) {
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SDNode *Node = --ISelPosition;
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2008-10-31 16:12:56 +00:00
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#if 0
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2008-10-27 21:56:29 +00:00
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DAG.setSubgraphColor(Node, "red");
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2008-10-28 17:23:13 +00:00
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#endif
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2008-07-27 21:46:04 +00:00
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SDNode *ResNode = Select(SDValue(Node, 0));
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2008-05-14 10:17:11 +00:00
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// If node should not be replaced,
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// continue with the next one.
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if (ResNode == Node)
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continue;
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// Replace node.
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2008-10-27 21:56:29 +00:00
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if (ResNode) {
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2008-10-31 16:12:56 +00:00
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#if 0
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2008-10-27 21:56:29 +00:00
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DAG.setSubgraphColor(ResNode, "yellow");
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DAG.setSubgraphColor(ResNode, "black");
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2008-10-28 17:23:13 +00:00
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#endif
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2008-05-14 10:17:11 +00:00
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ReplaceUses(Node, ResNode);
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2008-10-27 21:56:29 +00:00
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}
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2008-05-14 10:17:11 +00:00
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// If after the replacement this node is not used any more,
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// remove this dead node.
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if (Node->use_empty()) { // Don't delete EntryToken, etc.
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Eliminate the ISel priority queue, which used the topological order for a
priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.
The impact on most targets is that AddToISelQueue calls can be simply removed.
In the x86 target, there are two additional notable changes.
The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.
Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05 04:14:16 +00:00
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ISelUpdater ISU(ISelPosition);
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CurDAG->RemoveDeadNode(Node, &ISU);
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2008-05-14 10:17:11 +00:00
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}
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}
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2008-08-21 16:36:34 +00:00
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CurDAG->setRoot(Dummy.getValue());
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2008-05-14 10:17:11 +00:00
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}
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#endif /* LLVM_CODEGEN_DAGISEL_HEADER_H */
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