2009-07-02 22:18:33 +00:00
|
|
|
//===- Thumb2RegisterInfo.cpp - Thumb-2 Register Information -------*- C++ -*-===//
|
2009-06-27 12:16:40 +00:00
|
|
|
//
|
|
|
|
// The LLVM Compiler Infrastructure
|
|
|
|
//
|
|
|
|
// This file is distributed under the University of Illinois Open Source
|
|
|
|
// License. See LICENSE.TXT for details.
|
|
|
|
//
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
//
|
2009-07-02 22:18:33 +00:00
|
|
|
// This file contains the Thumb-2 implementation of the TargetRegisterInfo class.
|
2009-06-27 12:16:40 +00:00
|
|
|
//
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
|
|
|
|
#include "ARM.h"
|
|
|
|
#include "ARMAddressingModes.h"
|
2009-07-08 20:28:28 +00:00
|
|
|
#include "ARMBaseInstrInfo.h"
|
2009-06-27 12:16:40 +00:00
|
|
|
#include "ARMMachineFunctionInfo.h"
|
|
|
|
#include "ARMSubtarget.h"
|
2009-07-02 22:18:33 +00:00
|
|
|
#include "Thumb2InstrInfo.h"
|
|
|
|
#include "Thumb2RegisterInfo.h"
|
2009-06-27 12:16:40 +00:00
|
|
|
#include "llvm/Constants.h"
|
|
|
|
#include "llvm/DerivedTypes.h"
|
2009-07-14 23:09:55 +00:00
|
|
|
#include "llvm/Function.h"
|
|
|
|
#include "llvm/LLVMContext.h"
|
2009-06-27 12:16:40 +00:00
|
|
|
#include "llvm/CodeGen/MachineConstantPool.h"
|
|
|
|
#include "llvm/CodeGen/MachineFrameInfo.h"
|
|
|
|
#include "llvm/CodeGen/MachineFunction.h"
|
|
|
|
#include "llvm/CodeGen/MachineInstrBuilder.h"
|
|
|
|
#include "llvm/CodeGen/MachineLocation.h"
|
|
|
|
#include "llvm/CodeGen/MachineRegisterInfo.h"
|
|
|
|
#include "llvm/Target/TargetFrameInfo.h"
|
|
|
|
#include "llvm/Target/TargetMachine.h"
|
|
|
|
#include "llvm/ADT/BitVector.h"
|
|
|
|
#include "llvm/ADT/SmallVector.h"
|
|
|
|
#include "llvm/Support/CommandLine.h"
|
2009-07-08 18:01:40 +00:00
|
|
|
#include "llvm/Support/ErrorHandling.h"
|
2009-06-27 12:16:40 +00:00
|
|
|
using namespace llvm;
|
|
|
|
|
2009-07-08 18:31:39 +00:00
|
|
|
Thumb2RegisterInfo::Thumb2RegisterInfo(const ARMBaseInstrInfo &tii,
|
2009-07-02 22:18:33 +00:00
|
|
|
const ARMSubtarget &sti)
|
2009-06-27 12:16:40 +00:00
|
|
|
: ARMBaseRegisterInfo(tii, sti) {
|
|
|
|
}
|
|
|
|
|
|
|
|
/// emitLoadConstPool - Emits a load from constpool to materialize the
|
|
|
|
/// specified immediate.
|
2009-07-02 22:18:33 +00:00
|
|
|
void Thumb2RegisterInfo::emitLoadConstPool(MachineBasicBlock &MBB,
|
|
|
|
MachineBasicBlock::iterator &MBBI,
|
2009-07-08 20:28:28 +00:00
|
|
|
DebugLoc dl,
|
2009-07-16 09:20:10 +00:00
|
|
|
unsigned DestReg, unsigned SubIdx,
|
|
|
|
int Val,
|
2009-07-08 18:31:39 +00:00
|
|
|
ARMCC::CondCodes Pred,
|
|
|
|
unsigned PredReg) const {
|
2009-06-27 12:16:40 +00:00
|
|
|
MachineFunction &MF = *MBB.getParent();
|
|
|
|
MachineConstantPool *ConstantPool = MF.getConstantPool();
|
2009-07-14 23:09:55 +00:00
|
|
|
Constant *C =
|
|
|
|
MF.getFunction()->getContext()->getConstantInt(Type::Int32Ty, Val);
|
2009-06-27 12:16:40 +00:00
|
|
|
unsigned Idx = ConstantPool->getConstantPoolIndex(C, 4);
|
|
|
|
|
2009-07-16 09:20:10 +00:00
|
|
|
BuildMI(MBB, MBBI, dl, TII.get(ARM::t2LDRpci))
|
|
|
|
.addReg(DestReg, getDefRegState(true), SubIdx)
|
2009-07-08 23:10:31 +00:00
|
|
|
.addConstantPoolIndex(Idx).addImm((int64_t)ARMCC::AL).addReg(0);
|
2009-06-27 12:16:40 +00:00
|
|
|
}
|
|
|
|
|
2009-07-08 23:10:31 +00:00
|
|
|
bool Thumb2RegisterInfo::
|
|
|
|
requiresRegisterScavenging(const MachineFunction &MF) const {
|
|
|
|
// FIXME
|
2009-06-27 12:16:40 +00:00
|
|
|
return false;
|
|
|
|
}
|