llvm-6502/test/CodeGen/ARM/2009-10-27-double-align.ll

; RUN: llc < %s  -mtriple=arm-linux-gnueabi  | FileCheck %s

@.str = private constant [1 x i8] zeroinitializer, align 1

define arm_aapcscc void @g() {
entry:
;CHECK: [sp, #8]
;CHECK: [sp, #12]
;CHECK: [sp]
        tail call arm_aapcscc  void (i8*, ...)* @f(i8* getelementptr ([1 x i8]* @.str, i32 0, i32 0), i32 1, double 2.000000e+00, i32 3, double 4.000000e+00)
        ret void
}

declare arm_aapcscc void @f(i8*, ...)
Add missing testcase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85266 91177308-0d34-0410-b5e6-96231b3b80d8 2009-10-27 17:59:03 +00:00			`; RUN: llc < %s -mtriple=arm-linux-gnueabi \| FileCheck %s`

			`@.str = private constant [1 x i8] zeroinitializer, align 1`

			`define arm_aapcscc void @g() {`
			`entry:`
Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm instructions to help disassembly. We also changed the output of the addressing modes to omit the '+' from the assembler syntax #+/-<imm> or +/-<Rm>. See, for example, A8.6.57/58/60. And modified test cases to not expect '+' in +reg or #+num. For example, ; CHECK: ldr.w r9, [r7, #28] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98745 91177308-0d34-0410-b5e6-96231b3b80d8 2010-03-17 17:52:21 +00:00			`;CHECK: [sp, #8]`
			`;CHECK: [sp, #12]`
Add missing testcase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85266 91177308-0d34-0410-b5e6-96231b3b80d8 2009-10-27 17:59:03 +00:00			`;CHECK: [sp]`
			`tail call arm_aapcscc void (i8, ...) @f(i8* getelementptr ([1 x i8]* @.str, i32 0, i32 0), i32 1, double 2.000000e+00, i32 3, double 4.000000e+00)`
			`ret void`
			`}`

			`declare arm_aapcscc void @f(i8*, ...)`