llvm-6502/test/CodeGen/Thumb2/2009-08-08-ScavengerAssert.ll

; RUN: llc < %s -mtriple=armv7-eabi -mattr=+vfp2
; PR4686

@g_d = external global double		; <double*> [#uses=1]

define arm_aapcscc void @foo(float %yIncr) {
entry:
	br i1 undef, label %bb, label %bb4

bb:		; preds = %entry
	%0 = call arm_aapcs_vfpcc  float @bar()		; <float> [#uses=1]
	%1 = fpext float %0 to double		; <double> [#uses=1]
	store double %1, double* @g_d, align 8
	br label %bb4

bb4:		; preds = %bb, %entry
	unreachable
}

declare arm_aapcs_vfpcc float @bar()
Eliminate more uses of llvm-as and llvm-dis. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81293 91177308-0d34-0410-b5e6-96231b3b80d8 2009-09-09 00:09:15 +00:00			`; RUN: llc < %s -mtriple=armv7-eabi -mattr=+vfp2`
Simplify RegScavenger::forward a bit more. Verify that early clobber registers and their aliases are not used. All changes to RegsAvailable are now done as a transaction so the order of operands makes no difference. The included test case is from PR4686. It has behaviour that was dependent on the order of operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78465 91177308-0d34-0410-b5e6-96231b3b80d8 2009-08-08 13:18:47 +00:00			`; PR4686`

			`@g_d = external global double ; <double*> [#uses=1]`

			`define arm_aapcscc void @foo(float %yIncr) {`
			`entry:`
			`br i1 undef, label %bb, label %bb4`

			`bb: ; preds = %entry`
			`%0 = call arm_aapcs_vfpcc float @bar() ; <float> [#uses=1]`
			`%1 = fpext float %0 to double ; <double> [#uses=1]`
			`store double %1, double* @g_d, align 8`
			`br label %bb4`

			`bb4: ; preds = %bb, %entry`
			`unreachable`
			`}`

			`declare arm_aapcs_vfpcc float @bar()`