mirror of
https://github.com/c64scene-ar/llvm-6502.git
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77 lines
3.6 KiB
LLVM
77 lines
3.6 KiB
LLVM
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; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a5 | FileCheck %s -check-prefix=LINUXA5
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; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a8 | FileCheck %s -check-prefix=LINUXA8
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; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a9 | FileCheck %s -check-prefix=LINUXA9
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; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a15 | FileCheck %s -check-prefix=LINUXA15
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; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=swift | FileCheck %s -check-prefix=LINUXSWIFT
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; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a5 --enable-unsafe-fp-math | FileCheck %s -check-prefix=UNSAFEA5
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; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a8 --enable-unsafe-fp-math | FileCheck %s -check-prefix=UNSAFEA8
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; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a9 --enable-unsafe-fp-math | FileCheck %s -check-prefix=UNSAFEA9
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; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a15 --enable-unsafe-fp-math | FileCheck %s -check-prefix=UNSAFEA15
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; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=swift --enable-unsafe-fp-math | FileCheck %s -check-prefix=UNSAFESWIFT
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; RUN: llc < %s -mtriple armv7a-none-darwin -mcpu=cortex-a5 | FileCheck %s -check-prefix=DARWINA5
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; RUN: llc < %s -mtriple armv7a-none-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=DARWINA8
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; RUN: llc < %s -mtriple armv7a-none-darwin -mcpu=cortex-a9 | FileCheck %s -check-prefix=DARWINA9
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; RUN: llc < %s -mtriple armv7a-none-darwin -mcpu=cortex-a15 | FileCheck %s -check-prefix=DARWINA15
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; RUN: llc < %s -mtriple armv7a-none-darwin -mcpu=swift | FileCheck %s -check-prefix=DARWINSWIFT
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; This test makes sure we're not lowering VMUL.f32 D* (aka. NEON) for single-prec. FP ops, since
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; NEON is not fully IEEE 754 compliant, unless unsafe-math is selected.
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@.str = private unnamed_addr constant [12 x i8] c"S317\09%.5g \0A\00", align 1
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; CHECK-LINUXA5: main:
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; CHECK-LINUXA8: main:
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; CHECK-LINUXA9: main:
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; CHECK-LINUXA15: main:
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; CHECK-LINUXSWIFT: main:
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; CHECK-UNSAFEA5: main:
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; CHECK-UNSAFEA8: main:
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; CHECK-UNSAFEA9: main:
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; CHECK-UNSAFEA15: main:
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; CHECK-UNSAFESWIFT: main:
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; CHECK-DARWINA5: main:
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; CHECK-DARWINA8: main:
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; CHECK-DARWINA9: main:
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; CHECK-DARWINA15: main:
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; CHECK-DARWINSWIFT: main:
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define i32 @main() {
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%i.04 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
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%q.03 = phi float [ 1.000000e+00, %entry ], [ %mul, %for.body ]
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%mul = fmul float %q.03, 0x3FEFAE1480000000
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; CHECK-LINUXA5: vmul.f32 s{{[0-9]*}}
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; CHECK-LINUXA8: vmul.f32 s{{[0-9]*}}
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; CHECK-LINUXA9: vmul.f32 s{{[0-9]*}}
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; CHECK-LINUXA15: vmul.f32 s{{[0-9]*}}
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; Swift is *always* unsafe
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; CHECK-LINUXSWIFT: vmul.f32 d{{[0-9]*}}
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; CHECK-UNSAFEA5: vmul.f32 d{{[0-9]*}}
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; CHECK-UNSAFEA8: vmul.f32 d{{[0-9]*}}
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; A9 and A15 don't need this
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; CHECK-UNSAFEA9: vmul.f32 s{{[0-9]*}}
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; CHECK-UNSAFEA15: vmul.f32 s{{[0-9]*}}
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; CHECK-UNSAFESWIFT: vmul.f32 d{{[0-9]*}}
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; CHECK-DARWINA5: vmul.f32 d{{[0-9]*}}
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; CHECK-DARWINA8: vmul.f32 d{{[0-9]*}}
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; CHECK-DARWINA9: vmul.f32 s{{[0-9]*}}
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; CHECK-DARWINA15: vmul.f32 s{{[0-9]*}}
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; CHECK-DARWINSWIFT: vmul.f32 d{{[0-9]*}}
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%conv = fpext float %mul to double
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%call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([12 x i8]* @.str, i32 0, i32 0), double %conv) #1
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%inc = add nsw i32 %i.04, 1
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%exitcond = icmp eq i32 %inc, 16000
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body
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ret i32 0
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}
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declare i32 @printf(i8* nocapture, ...)
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