llvm-6502/test/MC/Mips/mips64r6/invalid-mips1.s

# Instructions that are invalid
#
# RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r6 \
# RUN:     2>%t1
# RUN: FileCheck %s < %t1

	.set noat
        addi      $13,$9,26322        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
[mips][mips64r6] addi is not available on MIPS32r6/MIPS64r6 Summary: Depends on D3787. Tablegen will raise an assertion without it. Reviewers: zoran.jovanovic, jkolek, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3842 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209419 91177308-0d34-0410-b5e6-96231b3b80d8 2014-05-22 11:42:31 +00:00			`# Instructions that are invalid`
			`#`
			`# RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r6 \`
			`# RUN: 2>%t1`
			`# RUN: FileCheck %s < %t1`

			`.set noat`
			`addi $13,$9,26322 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled`