llvm-6502/include/llvm/MC/MCModuleYAML.h

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MC CFG: Add YAML MCModule representation to enable MC CFG testing. Like yaml ObjectFiles, this will be very useful for testing the MC CFG implementation (mostly MCObjectDisassembler), by matching the output with YAML, and for potential users of the MC CFG, by using it as an input. There isn't much to the actual format, it is just a serialization of the MCModule class. Of note: - Basic block references (pred/succ, ..) are represented by the BB's start address. - Just as in the MC CFG, instructions are MCInsts with a size. - Operands have a prefix representing the type (only register and immediate supported here). - Instruction opcodes are represented by their names; enum values aren't stable, enum names mostly are: usually, a change to a name would need lots of changes in the backend anyway. Same with registers. All in all, an example is better than 1000 words, here goes: A simple binary: Disassembly of section __TEXT,__text: _main: 100000f9c: 48 8b 46 08 movq 8(%rsi), %rax 100000fa0: 0f be 00 movsbl (%rax), %eax 100000fa3: 3b 04 25 48 00 00 00 cmpl 72, %eax 100000faa: 0f 8c 07 00 00 00 jl 7 <.Lend> 100000fb0: 2b 04 25 48 00 00 00 subl 72, %eax .Lend: 100000fb7: c3 ret And the (pretty verbose) generated YAML: --- Atoms: - StartAddress: 0x0000000100000F9C Size: 20 Type: Text Content: - Inst: MOV64rm Size: 4 Ops: [ RRAX, RRSI, I1, R, I8, R ] - Inst: MOVSX32rm8 Size: 3 Ops: [ REAX, RRAX, I1, R, I0, R ] - Inst: CMP32rm Size: 7 Ops: [ REAX, R, I1, R, I72, R ] - Inst: JL_4 Size: 6 Ops: [ I7 ] - StartAddress: 0x0000000100000FB0 Size: 7 Type: Text Content: - Inst: SUB32rm Size: 7 Ops: [ REAX, REAX, R, I1, R, I72, R ] - StartAddress: 0x0000000100000FB7 Size: 1 Type: Text Content: - Inst: RET Size: 1 Ops: [ ] Functions: - Name: __text BasicBlocks: - Address: 0x0000000100000F9C Preds: [ ] Succs: [ 0x0000000100000FB7, 0x0000000100000FB0 ] <snip> ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188890 91177308-0d34-0410-b5e6-96231b3b80d8
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//===- MCModuleYAML.h - MCModule YAMLIO implementation ----------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This file declares classes for handling the YAML representation
/// of MCModule.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_MC_MCMODULEYAML_H
#define LLVM_MC_MCMODULEYAML_H
MC CFG: Add YAML MCModule representation to enable MC CFG testing. Like yaml ObjectFiles, this will be very useful for testing the MC CFG implementation (mostly MCObjectDisassembler), by matching the output with YAML, and for potential users of the MC CFG, by using it as an input. There isn't much to the actual format, it is just a serialization of the MCModule class. Of note: - Basic block references (pred/succ, ..) are represented by the BB's start address. - Just as in the MC CFG, instructions are MCInsts with a size. - Operands have a prefix representing the type (only register and immediate supported here). - Instruction opcodes are represented by their names; enum values aren't stable, enum names mostly are: usually, a change to a name would need lots of changes in the backend anyway. Same with registers. All in all, an example is better than 1000 words, here goes: A simple binary: Disassembly of section __TEXT,__text: _main: 100000f9c: 48 8b 46 08 movq 8(%rsi), %rax 100000fa0: 0f be 00 movsbl (%rax), %eax 100000fa3: 3b 04 25 48 00 00 00 cmpl 72, %eax 100000faa: 0f 8c 07 00 00 00 jl 7 <.Lend> 100000fb0: 2b 04 25 48 00 00 00 subl 72, %eax .Lend: 100000fb7: c3 ret And the (pretty verbose) generated YAML: --- Atoms: - StartAddress: 0x0000000100000F9C Size: 20 Type: Text Content: - Inst: MOV64rm Size: 4 Ops: [ RRAX, RRSI, I1, R, I8, R ] - Inst: MOVSX32rm8 Size: 3 Ops: [ REAX, RRAX, I1, R, I0, R ] - Inst: CMP32rm Size: 7 Ops: [ REAX, R, I1, R, I72, R ] - Inst: JL_4 Size: 6 Ops: [ I7 ] - StartAddress: 0x0000000100000FB0 Size: 7 Type: Text Content: - Inst: SUB32rm Size: 7 Ops: [ REAX, REAX, R, I1, R, I72, R ] - StartAddress: 0x0000000100000FB7 Size: 1 Type: Text Content: - Inst: RET Size: 1 Ops: [ ] Functions: - Name: __text BasicBlocks: - Address: 0x0000000100000F9C Preds: [ ] Succs: [ 0x0000000100000FB7, 0x0000000100000FB0 ] <snip> ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188890 91177308-0d34-0410-b5e6-96231b3b80d8
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#include "llvm/ADT/StringRef.h"
#include "llvm/MC/MCModule.h"
#include "llvm/Support/raw_ostream.h"
namespace llvm {
class MCInstrInfo;
class MCRegisterInfo;
/// \brief Dump a YAML representation of the MCModule \p MCM to \p OS.
/// \returns The empty string on success, an error message on failure.
StringRef mcmodule2yaml(raw_ostream &OS, const MCModule &MCM,
const MCInstrInfo &MII, const MCRegisterInfo &MRI);
/// \brief Creates a new module and returns it in \p MCM.
/// \returns The empty string on success, an error message on failure.
StringRef yaml2mcmodule(std::unique_ptr<MCModule> &MCM, StringRef YamlContent,
MC CFG: Add YAML MCModule representation to enable MC CFG testing. Like yaml ObjectFiles, this will be very useful for testing the MC CFG implementation (mostly MCObjectDisassembler), by matching the output with YAML, and for potential users of the MC CFG, by using it as an input. There isn't much to the actual format, it is just a serialization of the MCModule class. Of note: - Basic block references (pred/succ, ..) are represented by the BB's start address. - Just as in the MC CFG, instructions are MCInsts with a size. - Operands have a prefix representing the type (only register and immediate supported here). - Instruction opcodes are represented by their names; enum values aren't stable, enum names mostly are: usually, a change to a name would need lots of changes in the backend anyway. Same with registers. All in all, an example is better than 1000 words, here goes: A simple binary: Disassembly of section __TEXT,__text: _main: 100000f9c: 48 8b 46 08 movq 8(%rsi), %rax 100000fa0: 0f be 00 movsbl (%rax), %eax 100000fa3: 3b 04 25 48 00 00 00 cmpl 72, %eax 100000faa: 0f 8c 07 00 00 00 jl 7 <.Lend> 100000fb0: 2b 04 25 48 00 00 00 subl 72, %eax .Lend: 100000fb7: c3 ret And the (pretty verbose) generated YAML: --- Atoms: - StartAddress: 0x0000000100000F9C Size: 20 Type: Text Content: - Inst: MOV64rm Size: 4 Ops: [ RRAX, RRSI, I1, R, I8, R ] - Inst: MOVSX32rm8 Size: 3 Ops: [ REAX, RRAX, I1, R, I0, R ] - Inst: CMP32rm Size: 7 Ops: [ REAX, R, I1, R, I72, R ] - Inst: JL_4 Size: 6 Ops: [ I7 ] - StartAddress: 0x0000000100000FB0 Size: 7 Type: Text Content: - Inst: SUB32rm Size: 7 Ops: [ REAX, REAX, R, I1, R, I72, R ] - StartAddress: 0x0000000100000FB7 Size: 1 Type: Text Content: - Inst: RET Size: 1 Ops: [ ] Functions: - Name: __text BasicBlocks: - Address: 0x0000000100000F9C Preds: [ ] Succs: [ 0x0000000100000FB7, 0x0000000100000FB0 ] <snip> ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188890 91177308-0d34-0410-b5e6-96231b3b80d8
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const MCInstrInfo &MII, const MCRegisterInfo &MRI);
} // end namespace llvm
#endif