llvm-6502/test/CodeGen/ARM/thumb-alignment.ll

; RUN: llc -relocation-model=pic -mtriple=thumbv7-unknown-linux -o - %s | FileCheck %s

@x = external global i32

; CHECK: .globl	foo
; CHECK-NEXT: .align	2
define i32* @foo() {
  ret i32* @x
}

; CHECK: .globl	bar
; CHECK-NEXT: .align	1
define i32* @bar() {
  ret i32* zeroinitializer
}
ARM: Only enforce 4-byte alignment on Thumb-2 functions with constant pools. This appears to have been introduced back in r76698 as part of an unrelated change. I can find no official ARM documentation stating that Thumb-2 functions require 4-byte alignment; in fact, ARM documentation appears to contradict this (see, e.g., ARM Architecture Reference Manual Thumb-2 Supplement, section 2.6.1: "Thumb-2 enforces 16-bit alignment on all instructions."). Also remove code that sets alignment for ARM functions, which is redundant with code in the MachineFunction constructor, and remove the hidden -arm-align-constant-islands flag, which has been enabled by default since r146739 (Dec 2011) and has probably received sufficient testing by now. Differential Revision: http://reviews.llvm.org/D9138 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235636 91177308-0d34-0410-b5e6-96231b3b80d8 2015-04-23 20:31:22 +00:00			`; RUN: llc -relocation-model=pic -mtriple=thumbv7-unknown-linux -o - %s \| FileCheck %s`

			`@x = external global i32`

			`; CHECK: .globl foo`
			`; CHECK-NEXT: .align 2`
			`define i32* @foo() {`
			`ret i32* @x`
			`}`

			`; CHECK: .globl bar`
			`; CHECK-NEXT: .align 1`
			`define i32* @bar() {`
			`ret i32* zeroinitializer`
			`}`