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llvm-6502/test/MC/Disassembler/X86/intel-syntax.txt

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Add disassembler test for Intel syntax. Tests r139353. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139356 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-09 06:35:44 +00:00
# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 -x86-asm-syntax=intel | FileCheck %s
# CHECK: movsb
0xa4
# CHECK: movsw
0x66 0xa5
# CHECK: movsd
0xa5
# CHECK: movsq
0x48 0xa5
Fix register printing in disassembling of push/pop of segment registers and in/out in Intel syntax mode. Fixes PR10960 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140299 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 07:01:50 +00:00
Don't allow 32-bit only instructions to be disassembled in 64-bit mode. Fixes part of PR10700. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140370 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 06:57:25 +00:00
# CHECK: pop FS
0x0f 0xa1
Fix register printing in disassembling of push/pop of segment registers and in/out in Intel syntax mode. Fixes PR10960 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140299 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 07:01:50 +00:00
Don't allow 32-bit only instructions to be disassembled in 64-bit mode. Fixes part of PR10700. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140370 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 06:57:25 +00:00
# CHECK: pop GS
0x0f 0xa9
Fix register printing in disassembling of push/pop of segment registers and in/out in Intel syntax mode. Fixes PR10960 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140299 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 07:01:50 +00:00
# CHECK: in AL, DX
0xec
Fix some Intel syntax disassembly issues with instructions that implicitly use AL/AX/EAX/RAX such as ADD/SUB/ADC/SUBB/XOR/OR/AND/CMP/MOV/TEST. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140974 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-02 21:08:12 +00:00
# CHECK: nop
0x90
# CHECK: xchg EAX, R8D
0x41 0x90
# CHECK: xchg RAX, R8
0x49 0x90
# CHECK: add AL, 0
0x04 0x00
# CHECK: add AX, 0
0x66 0x05 0x00 0x00
# CHECK: add EAX, 0
0x05 0x00 0x00 0x00 0x00
# CHECK: add RAX, 0
0x48 0x05 0x00 0x00 0x00 0x00
# CHECK: adc AL, 0
0x14 0x00
# CHECK: adc AX, 0
0x66 0x15 0x00 0x00
# CHECK: adc EAX, 0
0x15 0x00 0x00 0x00 0x00
# CHECK: adc RAX, 0
0x48 0x15 0x00 0x00 0x00 0x00
# CHECK: cmp AL, 0
0x3c 0x00
# CHECK: cmp AX, 0
0x66 0x3d 0x00 0x00
# CHECK: cmp EAX, 0
0x3d 0x00 0x00 0x00 0x00
# CHECK: cmp RAX, 0
0x48 0x3d 0x00 0x00 0x00 0x00
# CHECK: test AL, 0
0xa8 0x00
# CHECK: test AX, 0
0x66 0xa9 0x00 0x00
# CHECK: test EAX, 0
0xa9 0x00 0x00 0x00 0x00
# CHECK: test RAX, 0
0x48 0xa9 0x00 0x00 0x00 0x00
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