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https://github.com/c64scene-ar/llvm-6502.git
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32 lines
1.3 KiB
LLVM
32 lines
1.3 KiB
LLVM
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; RUN: llvm-as < %s | opt -loop-index-split -disable-output
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%struct.RExC_state_t = type { i32, i8*, %struct.regexp*, i8*, i8*, i8*, i32, %struct.regnode*, %struct.regnode*, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
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%struct.SV = type { i8*, i32, i32 }
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%struct.reg_data = type { i32, i8*, [1 x i8*] }
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%struct.reg_substr_data = type { [3 x %struct.reg_substr_datum] }
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%struct.reg_substr_datum = type { i32, i32, %struct.SV*, %struct.SV* }
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%struct.regexp = type { i32*, i32*, %struct.regnode*, %struct.reg_substr_data*, i8*, %struct.reg_data*, i8*, i32*, i32, i32, i32, i32, i32, i32, i32, i32, [1 x %struct.regnode] }
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%struct.regnode = type { i8, i8, i16 }
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define fastcc %struct.regnode* @S_regclass(%struct.RExC_state_t* %pRExC_state) nounwind {
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entry:
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br label %bb439
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bb439: ; preds = %bb444, %entry
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%value23.16.reg2mem.0 = phi i32 [ %3, %bb444 ], [ 0, %entry ] ; <i32> [#uses=3]
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%0 = icmp ugt i32 %value23.16.reg2mem.0, 31 ; <i1> [#uses=1]
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%1 = icmp ne i32 %value23.16.reg2mem.0, 127 ; <i1> [#uses=1]
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%2 = and i1 %0, %1 ; <i1> [#uses=1]
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br i1 %2, label %bb443, label %bb444
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bb443: ; preds = %bb439
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br label %bb444
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bb444: ; preds = %bb443, %bb439
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%3 = add i32 %value23.16.reg2mem.0, 1 ; <i32> [#uses=2]
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%4 = icmp ugt i32 %3, 255 ; <i1> [#uses=1]
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br i1 %4, label %bb675, label %bb439
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bb675: ; preds = %bb444
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unreachable
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}
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