2013-09-14 02:44:02 +00:00
|
|
|
; RUN: opt -S -simplifycfg < %s | FileCheck -check-prefix=CHECK %s
|
2013-11-10 02:16:47 +00:00
|
|
|
; RUN: opt -S -default-data-layout="p:32:32-p1:16:16" -simplifycfg < %s | FileCheck -check-prefix=CHECK -check-prefix=DL %s
|
2008-03-18 03:45:45 +00:00
|
|
|
|
|
|
|
declare void @foo1()
|
|
|
|
|
|
|
|
declare void @foo2()
|
|
|
|
|
|
|
|
define void @test1(i32 %V) {
|
|
|
|
%C1 = icmp eq i32 %V, 4 ; <i1> [#uses=1]
|
|
|
|
%C2 = icmp eq i32 %V, 17 ; <i1> [#uses=1]
|
|
|
|
%CN = or i1 %C1, %C2 ; <i1> [#uses=1]
|
|
|
|
br i1 %CN, label %T, label %F
|
|
|
|
T: ; preds = %0
|
|
|
|
call void @foo1( )
|
|
|
|
ret void
|
|
|
|
F: ; preds = %0
|
|
|
|
call void @foo2( )
|
|
|
|
ret void
|
2013-07-14 01:42:54 +00:00
|
|
|
; CHECK-LABEL: @test1(
|
fix a fairly serious oversight with switch formation from
or'd conditions. Previously we'd compile something like this:
int crud (unsigned char c) {
return c == 62 || c == 34 || c == 92;
}
into:
switch i8 %c, label %lor.rhs [
i8 62, label %lor.end
i8 34, label %lor.end
]
lor.rhs: ; preds = %entry
%cmp8 = icmp eq i8 %c, 92
br label %lor.end
lor.end: ; preds = %entry, %entry, %lor.rhs
%0 = phi i1 [ true, %entry ], [ %cmp8, %lor.rhs ], [ true, %entry ]
%lor.ext = zext i1 %0 to i32
ret i32 %lor.ext
which failed to merge the compare-with-92 into the switch. With this patch
we simplify this all the way to:
switch i8 %c, label %lor.rhs [
i8 62, label %lor.end
i8 34, label %lor.end
i8 92, label %lor.end
]
lor.rhs: ; preds = %entry
br label %lor.end
lor.end: ; preds = %entry, %entry, %entry, %lor.rhs
%0 = phi i1 [ true, %entry ], [ false, %lor.rhs ], [ true, %entry ], [ true, %entry ]
%lor.ext = zext i1 %0 to i32
ret i32 %lor.ext
which is much better for codegen's switch lowering stuff. This kicks in 33 times
on 176.gcc (for example) cutting 103 instructions off the generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121671 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-13 03:18:54 +00:00
|
|
|
; CHECK: switch i32 %V, label %F [
|
|
|
|
; CHECK: i32 17, label %T
|
|
|
|
; CHECK: i32 4, label %T
|
|
|
|
; CHECK: ]
|
2004-02-24 05:34:44 +00:00
|
|
|
}
|
|
|
|
|
2013-09-14 02:44:02 +00:00
|
|
|
define void @test1_ptr(i32* %V) {
|
|
|
|
%C1 = icmp eq i32* %V, inttoptr (i32 4 to i32*)
|
|
|
|
%C2 = icmp eq i32* %V, inttoptr (i32 17 to i32*)
|
|
|
|
%CN = or i1 %C1, %C2 ; <i1> [#uses=1]
|
|
|
|
br i1 %CN, label %T, label %F
|
|
|
|
T: ; preds = %0
|
|
|
|
call void @foo1( )
|
|
|
|
ret void
|
|
|
|
F: ; preds = %0
|
|
|
|
call void @foo2( )
|
|
|
|
ret void
|
2013-11-10 02:16:47 +00:00
|
|
|
; CHECK-LABEL: @test1_ptr(
|
2013-09-14 02:44:02 +00:00
|
|
|
; DL: %magicptr = ptrtoint i32* %V to i32
|
|
|
|
; DL: switch i32 %magicptr, label %F [
|
|
|
|
; DL: i32 17, label %T
|
|
|
|
; DL: i32 4, label %T
|
|
|
|
; DL: ]
|
|
|
|
}
|
|
|
|
|
2013-10-21 18:55:08 +00:00
|
|
|
define void @test1_ptr_as1(i32 addrspace(1)* %V) {
|
|
|
|
%C1 = icmp eq i32 addrspace(1)* %V, inttoptr (i32 4 to i32 addrspace(1)*)
|
|
|
|
%C2 = icmp eq i32 addrspace(1)* %V, inttoptr (i32 17 to i32 addrspace(1)*)
|
|
|
|
%CN = or i1 %C1, %C2 ; <i1> [#uses=1]
|
|
|
|
br i1 %CN, label %T, label %F
|
|
|
|
T: ; preds = %0
|
|
|
|
call void @foo1( )
|
|
|
|
ret void
|
|
|
|
F: ; preds = %0
|
|
|
|
call void @foo2( )
|
|
|
|
ret void
|
2013-11-10 02:16:47 +00:00
|
|
|
; CHECK-LABEL: @test1_ptr_as1(
|
2013-10-21 18:55:08 +00:00
|
|
|
; DL: %magicptr = ptrtoint i32 addrspace(1)* %V to i16
|
|
|
|
; DL: switch i16 %magicptr, label %F [
|
|
|
|
; DL: i16 17, label %T
|
|
|
|
; DL: i16 4, label %T
|
|
|
|
; DL: ]
|
|
|
|
}
|
|
|
|
|
2008-03-18 03:45:45 +00:00
|
|
|
define void @test2(i32 %V) {
|
|
|
|
%C1 = icmp ne i32 %V, 4 ; <i1> [#uses=1]
|
|
|
|
%C2 = icmp ne i32 %V, 17 ; <i1> [#uses=1]
|
|
|
|
%CN = and i1 %C1, %C2 ; <i1> [#uses=1]
|
|
|
|
br i1 %CN, label %T, label %F
|
|
|
|
T: ; preds = %0
|
|
|
|
call void @foo1( )
|
|
|
|
ret void
|
|
|
|
F: ; preds = %0
|
|
|
|
call void @foo2( )
|
|
|
|
ret void
|
2013-07-14 01:42:54 +00:00
|
|
|
; CHECK-LABEL: @test2(
|
fix a fairly serious oversight with switch formation from
or'd conditions. Previously we'd compile something like this:
int crud (unsigned char c) {
return c == 62 || c == 34 || c == 92;
}
into:
switch i8 %c, label %lor.rhs [
i8 62, label %lor.end
i8 34, label %lor.end
]
lor.rhs: ; preds = %entry
%cmp8 = icmp eq i8 %c, 92
br label %lor.end
lor.end: ; preds = %entry, %entry, %lor.rhs
%0 = phi i1 [ true, %entry ], [ %cmp8, %lor.rhs ], [ true, %entry ]
%lor.ext = zext i1 %0 to i32
ret i32 %lor.ext
which failed to merge the compare-with-92 into the switch. With this patch
we simplify this all the way to:
switch i8 %c, label %lor.rhs [
i8 62, label %lor.end
i8 34, label %lor.end
i8 92, label %lor.end
]
lor.rhs: ; preds = %entry
br label %lor.end
lor.end: ; preds = %entry, %entry, %entry, %lor.rhs
%0 = phi i1 [ true, %entry ], [ false, %lor.rhs ], [ true, %entry ], [ true, %entry ]
%lor.ext = zext i1 %0 to i32
ret i32 %lor.ext
which is much better for codegen's switch lowering stuff. This kicks in 33 times
on 176.gcc (for example) cutting 103 instructions off the generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121671 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-13 03:18:54 +00:00
|
|
|
; CHECK: switch i32 %V, label %T [
|
|
|
|
; CHECK: i32 17, label %F
|
|
|
|
; CHECK: i32 4, label %F
|
|
|
|
; CHECK: ]
|
2004-02-24 05:34:44 +00:00
|
|
|
}
|
|
|
|
|
2008-03-18 03:45:45 +00:00
|
|
|
define void @test3(i32 %V) {
|
|
|
|
%C1 = icmp eq i32 %V, 4 ; <i1> [#uses=1]
|
|
|
|
br i1 %C1, label %T, label %N
|
|
|
|
N: ; preds = %0
|
|
|
|
%C2 = icmp eq i32 %V, 17 ; <i1> [#uses=1]
|
|
|
|
br i1 %C2, label %T, label %F
|
|
|
|
T: ; preds = %N, %0
|
|
|
|
call void @foo1( )
|
|
|
|
ret void
|
|
|
|
F: ; preds = %N
|
|
|
|
call void @foo2( )
|
|
|
|
ret void
|
fix a fairly serious oversight with switch formation from
or'd conditions. Previously we'd compile something like this:
int crud (unsigned char c) {
return c == 62 || c == 34 || c == 92;
}
into:
switch i8 %c, label %lor.rhs [
i8 62, label %lor.end
i8 34, label %lor.end
]
lor.rhs: ; preds = %entry
%cmp8 = icmp eq i8 %c, 92
br label %lor.end
lor.end: ; preds = %entry, %entry, %lor.rhs
%0 = phi i1 [ true, %entry ], [ %cmp8, %lor.rhs ], [ true, %entry ]
%lor.ext = zext i1 %0 to i32
ret i32 %lor.ext
which failed to merge the compare-with-92 into the switch. With this patch
we simplify this all the way to:
switch i8 %c, label %lor.rhs [
i8 62, label %lor.end
i8 34, label %lor.end
i8 92, label %lor.end
]
lor.rhs: ; preds = %entry
br label %lor.end
lor.end: ; preds = %entry, %entry, %entry, %lor.rhs
%0 = phi i1 [ true, %entry ], [ false, %lor.rhs ], [ true, %entry ], [ true, %entry ]
%lor.ext = zext i1 %0 to i32
ret i32 %lor.ext
which is much better for codegen's switch lowering stuff. This kicks in 33 times
on 176.gcc (for example) cutting 103 instructions off the generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121671 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-13 03:18:54 +00:00
|
|
|
|
2013-07-14 01:42:54 +00:00
|
|
|
; CHECK-LABEL: @test3(
|
fix a fairly serious oversight with switch formation from
or'd conditions. Previously we'd compile something like this:
int crud (unsigned char c) {
return c == 62 || c == 34 || c == 92;
}
into:
switch i8 %c, label %lor.rhs [
i8 62, label %lor.end
i8 34, label %lor.end
]
lor.rhs: ; preds = %entry
%cmp8 = icmp eq i8 %c, 92
br label %lor.end
lor.end: ; preds = %entry, %entry, %lor.rhs
%0 = phi i1 [ true, %entry ], [ %cmp8, %lor.rhs ], [ true, %entry ]
%lor.ext = zext i1 %0 to i32
ret i32 %lor.ext
which failed to merge the compare-with-92 into the switch. With this patch
we simplify this all the way to:
switch i8 %c, label %lor.rhs [
i8 62, label %lor.end
i8 34, label %lor.end
i8 92, label %lor.end
]
lor.rhs: ; preds = %entry
br label %lor.end
lor.end: ; preds = %entry, %entry, %entry, %lor.rhs
%0 = phi i1 [ true, %entry ], [ false, %lor.rhs ], [ true, %entry ], [ true, %entry ]
%lor.ext = zext i1 %0 to i32
ret i32 %lor.ext
which is much better for codegen's switch lowering stuff. This kicks in 33 times
on 176.gcc (for example) cutting 103 instructions off the generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121671 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-13 03:18:54 +00:00
|
|
|
; CHECK: switch i32 %V, label %F [
|
|
|
|
; CHECK: i32 4, label %T
|
|
|
|
; CHECK: i32 17, label %T
|
|
|
|
; CHECK: ]
|
2005-02-24 02:13:50 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
fix a fairly serious oversight with switch formation from
or'd conditions. Previously we'd compile something like this:
int crud (unsigned char c) {
return c == 62 || c == 34 || c == 92;
}
into:
switch i8 %c, label %lor.rhs [
i8 62, label %lor.end
i8 34, label %lor.end
]
lor.rhs: ; preds = %entry
%cmp8 = icmp eq i8 %c, 92
br label %lor.end
lor.end: ; preds = %entry, %entry, %lor.rhs
%0 = phi i1 [ true, %entry ], [ %cmp8, %lor.rhs ], [ true, %entry ]
%lor.ext = zext i1 %0 to i32
ret i32 %lor.ext
which failed to merge the compare-with-92 into the switch. With this patch
we simplify this all the way to:
switch i8 %c, label %lor.rhs [
i8 62, label %lor.end
i8 34, label %lor.end
i8 92, label %lor.end
]
lor.rhs: ; preds = %entry
br label %lor.end
lor.end: ; preds = %entry, %entry, %entry, %lor.rhs
%0 = phi i1 [ true, %entry ], [ false, %lor.rhs ], [ true, %entry ], [ true, %entry ]
%lor.ext = zext i1 %0 to i32
ret i32 %lor.ext
which is much better for codegen's switch lowering stuff. This kicks in 33 times
on 176.gcc (for example) cutting 103 instructions off the generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121671 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-13 03:18:54 +00:00
|
|
|
|
|
|
|
define i32 @test4(i8 zeroext %c) nounwind ssp noredzone {
|
|
|
|
entry:
|
|
|
|
%cmp = icmp eq i8 %c, 62
|
|
|
|
br i1 %cmp, label %lor.end, label %lor.lhs.false
|
|
|
|
|
|
|
|
lor.lhs.false: ; preds = %entry
|
|
|
|
%cmp4 = icmp eq i8 %c, 34
|
|
|
|
br i1 %cmp4, label %lor.end, label %lor.rhs
|
|
|
|
|
|
|
|
lor.rhs: ; preds = %lor.lhs.false
|
|
|
|
%cmp8 = icmp eq i8 %c, 92
|
|
|
|
br label %lor.end
|
|
|
|
|
|
|
|
lor.end: ; preds = %lor.rhs, %lor.lhs.false, %entry
|
|
|
|
%0 = phi i1 [ true, %lor.lhs.false ], [ true, %entry ], [ %cmp8, %lor.rhs ]
|
|
|
|
%lor.ext = zext i1 %0 to i32
|
|
|
|
ret i32 %lor.ext
|
2013-09-14 02:44:02 +00:00
|
|
|
|
2013-07-14 01:42:54 +00:00
|
|
|
; CHECK-LABEL: @test4(
|
fix a fairly serious oversight with switch formation from
or'd conditions. Previously we'd compile something like this:
int crud (unsigned char c) {
return c == 62 || c == 34 || c == 92;
}
into:
switch i8 %c, label %lor.rhs [
i8 62, label %lor.end
i8 34, label %lor.end
]
lor.rhs: ; preds = %entry
%cmp8 = icmp eq i8 %c, 92
br label %lor.end
lor.end: ; preds = %entry, %entry, %lor.rhs
%0 = phi i1 [ true, %entry ], [ %cmp8, %lor.rhs ], [ true, %entry ]
%lor.ext = zext i1 %0 to i32
ret i32 %lor.ext
which failed to merge the compare-with-92 into the switch. With this patch
we simplify this all the way to:
switch i8 %c, label %lor.rhs [
i8 62, label %lor.end
i8 34, label %lor.end
i8 92, label %lor.end
]
lor.rhs: ; preds = %entry
br label %lor.end
lor.end: ; preds = %entry, %entry, %entry, %lor.rhs
%0 = phi i1 [ true, %entry ], [ false, %lor.rhs ], [ true, %entry ], [ true, %entry ]
%lor.ext = zext i1 %0 to i32
ret i32 %lor.ext
which is much better for codegen's switch lowering stuff. This kicks in 33 times
on 176.gcc (for example) cutting 103 instructions off the generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121671 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-13 03:18:54 +00:00
|
|
|
; CHECK: switch i8 %c, label %lor.rhs [
|
2012-07-02 13:02:18 +00:00
|
|
|
; CHECK: i8 62, label %lor.end
|
2012-07-02 23:22:21 +00:00
|
|
|
; CHECK: i8 34, label %lor.end
|
fix a fairly serious oversight with switch formation from
or'd conditions. Previously we'd compile something like this:
int crud (unsigned char c) {
return c == 62 || c == 34 || c == 92;
}
into:
switch i8 %c, label %lor.rhs [
i8 62, label %lor.end
i8 34, label %lor.end
]
lor.rhs: ; preds = %entry
%cmp8 = icmp eq i8 %c, 92
br label %lor.end
lor.end: ; preds = %entry, %entry, %lor.rhs
%0 = phi i1 [ true, %entry ], [ %cmp8, %lor.rhs ], [ true, %entry ]
%lor.ext = zext i1 %0 to i32
ret i32 %lor.ext
which failed to merge the compare-with-92 into the switch. With this patch
we simplify this all the way to:
switch i8 %c, label %lor.rhs [
i8 62, label %lor.end
i8 34, label %lor.end
i8 92, label %lor.end
]
lor.rhs: ; preds = %entry
br label %lor.end
lor.end: ; preds = %entry, %entry, %entry, %lor.rhs
%0 = phi i1 [ true, %entry ], [ false, %lor.rhs ], [ true, %entry ], [ true, %entry ]
%lor.ext = zext i1 %0 to i32
ret i32 %lor.ext
which is much better for codegen's switch lowering stuff. This kicks in 33 times
on 176.gcc (for example) cutting 103 instructions off the generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121671 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-13 03:18:54 +00:00
|
|
|
; CHECK: i8 92, label %lor.end
|
|
|
|
; CHECK: ]
|
|
|
|
}
|
|
|
|
|
2010-12-13 03:43:57 +00:00
|
|
|
define i32 @test5(i8 zeroext %c) nounwind ssp noredzone {
|
|
|
|
entry:
|
|
|
|
switch i8 %c, label %lor.rhs [
|
|
|
|
i8 62, label %lor.end
|
|
|
|
i8 34, label %lor.end
|
|
|
|
i8 92, label %lor.end
|
|
|
|
]
|
|
|
|
|
|
|
|
lor.rhs: ; preds = %entry
|
|
|
|
%V = icmp eq i8 %c, 92
|
|
|
|
br label %lor.end
|
|
|
|
|
|
|
|
lor.end: ; preds = %entry, %entry, %entry, %lor.rhs
|
|
|
|
%0 = phi i1 [ true, %entry ], [ %V, %lor.rhs ], [ true, %entry ], [ true, %entry ]
|
|
|
|
%lor.ext = zext i1 %0 to i32
|
|
|
|
ret i32 %lor.ext
|
2013-07-14 01:42:54 +00:00
|
|
|
; CHECK-LABEL: @test5(
|
2010-12-13 03:43:57 +00:00
|
|
|
; CHECK: switch i8 %c, label %lor.rhs [
|
|
|
|
; CHECK: i8 62, label %lor.end
|
|
|
|
; CHECK: i8 34, label %lor.end
|
|
|
|
; CHECK: i8 92, label %lor.end
|
|
|
|
; CHECK: ]
|
|
|
|
}
|
2010-12-13 04:45:56 +00:00
|
|
|
|
|
|
|
|
|
|
|
define i1 @test6({ i32, i32 }* %I) {
|
|
|
|
entry:
|
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
One of several parallel first steps to remove the target type of pointers,
replacing them with a single opaque pointer type.
This adds an explicit type parameter to the gep instruction so that when the
first parameter becomes an opaque pointer type, the type to gep through is
still available to the instructions.
* This doesn't modify gep operators, only instructions (operators will be
handled separately)
* Textual IR changes only. Bitcode (including upgrade) and changing the
in-memory representation will be in separate changes.
* geps of vectors are transformed as:
getelementptr <4 x float*> %x, ...
->getelementptr float, <4 x float*> %x, ...
Then, once the opaque pointer type is introduced, this will ultimately look
like:
getelementptr float, <4 x ptr> %x
with the unambiguous interpretation that it is a vector of pointers to float.
* address spaces remain on the pointer, not the type:
getelementptr float addrspace(1)* %x
->getelementptr float, float addrspace(1)* %x
Then, eventually:
getelementptr float, ptr addrspace(1) %x
Importantly, the massive amount of test case churn has been automated by
same crappy python code. I had to manually update a few test cases that
wouldn't fit the script's model (r228970,r229196,r229197,r229198). The
python script just massages stdin and writes the result to stdout, I
then wrapped that in a shell script to handle replacing files, then
using the usual find+xargs to migrate all the files.
update.py:
import fileinput
import sys
import re
ibrep = re.compile(r"(^.*?[^%\w]getelementptr inbounds )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")
normrep = re.compile( r"(^.*?[^%\w]getelementptr )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))")
def conv(match, line):
if not match:
return line
line = match.groups()[0]
if len(match.groups()[5]) == 0:
line += match.groups()[2]
line += match.groups()[3]
line += ", "
line += match.groups()[1]
line += "\n"
return line
for line in sys.stdin:
if line.find("getelementptr ") == line.find("getelementptr inbounds"):
if line.find("getelementptr inbounds") != line.find("getelementptr inbounds ("):
line = conv(re.match(ibrep, line), line)
elif line.find("getelementptr ") != line.find("getelementptr ("):
line = conv(re.match(normrep, line), line)
sys.stdout.write(line)
apply.sh:
for name in "$@"
do
python3 `dirname "$0"`/update.py < "$name" > "$name.tmp" && mv "$name.tmp" "$name"
rm -f "$name.tmp"
done
The actual commands:
From llvm/src:
find test/ -name *.ll | xargs ./apply.sh
From llvm/src/tools/clang:
find test/ -name *.mm -o -name *.m -o -name *.cpp -o -name *.c | xargs -I '{}' ../../apply.sh "{}"
From llvm/src/tools/polly:
find test/ -name *.ll | xargs ./apply.sh
After that, check-all (with llvm, clang, clang-tools-extra, lld,
compiler-rt, and polly all checked out).
The extra 'rm' in the apply.sh script is due to a few files in clang's test
suite using interesting unicode stuff that my python script was throwing
exceptions on. None of those files needed to be migrated, so it seemed
sufficient to ignore those cases.
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7636
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230786 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 19:29:02 +00:00
|
|
|
%tmp.1.i = getelementptr { i32, i32 }, { i32, i32 }* %I, i64 0, i32 1 ; <i32*> [#uses=1]
|
2015-02-27 21:17:42 +00:00
|
|
|
%tmp.2.i = load i32, i32* %tmp.1.i ; <i32> [#uses=6]
|
2010-12-13 04:45:56 +00:00
|
|
|
%tmp.2 = icmp eq i32 %tmp.2.i, 14 ; <i1> [#uses=1]
|
|
|
|
br i1 %tmp.2, label %shortcirc_done.4, label %shortcirc_next.0
|
|
|
|
shortcirc_next.0: ; preds = %entry
|
|
|
|
%tmp.6 = icmp eq i32 %tmp.2.i, 15 ; <i1> [#uses=1]
|
|
|
|
br i1 %tmp.6, label %shortcirc_done.4, label %shortcirc_next.1
|
|
|
|
shortcirc_next.1: ; preds = %shortcirc_next.0
|
|
|
|
%tmp.11 = icmp eq i32 %tmp.2.i, 16 ; <i1> [#uses=1]
|
|
|
|
br i1 %tmp.11, label %shortcirc_done.4, label %shortcirc_next.2
|
|
|
|
shortcirc_next.2: ; preds = %shortcirc_next.1
|
|
|
|
%tmp.16 = icmp eq i32 %tmp.2.i, 17 ; <i1> [#uses=1]
|
|
|
|
br i1 %tmp.16, label %shortcirc_done.4, label %shortcirc_next.3
|
|
|
|
shortcirc_next.3: ; preds = %shortcirc_next.2
|
|
|
|
%tmp.21 = icmp eq i32 %tmp.2.i, 18 ; <i1> [#uses=1]
|
|
|
|
br i1 %tmp.21, label %shortcirc_done.4, label %shortcirc_next.4
|
|
|
|
shortcirc_next.4: ; preds = %shortcirc_next.3
|
|
|
|
%tmp.26 = icmp eq i32 %tmp.2.i, 19 ; <i1> [#uses=1]
|
|
|
|
br label %UnifiedReturnBlock
|
|
|
|
shortcirc_done.4: ; preds = %shortcirc_next.3, %shortcirc_next.2, %shortcirc_next.1, %shortcirc_next.0, %entry
|
|
|
|
br label %UnifiedReturnBlock
|
|
|
|
UnifiedReturnBlock: ; preds = %shortcirc_done.4, %shortcirc_next.4
|
|
|
|
%UnifiedRetVal = phi i1 [ %tmp.26, %shortcirc_next.4 ], [ true, %shortcirc_done.4 ] ; <i1> [#uses=1]
|
|
|
|
ret i1 %UnifiedRetVal
|
2013-09-14 02:44:02 +00:00
|
|
|
|
2013-07-14 01:42:54 +00:00
|
|
|
; CHECK-LABEL: @test6(
|
2012-11-07 21:35:12 +00:00
|
|
|
; CHECK: %tmp.2.i.off = add i32 %tmp.2.i, -14
|
|
|
|
; CHECK: %switch = icmp ult i32 %tmp.2.i.off, 6
|
2010-12-13 04:45:56 +00:00
|
|
|
}
|
|
|
|
|
enhance the "change or icmp's into switch" xform to handle one value in an
'or sequence' that it doesn't understand. This allows us to optimize
something insane like this:
int crud (unsigned char c, unsigned x)
{
if(((((((((( (int) c <= 32 ||
(int) c == 46) || (int) c == 44)
|| (int) c == 58) || (int) c == 59) || (int) c == 60)
|| (int) c == 62) || (int) c == 34) || (int) c == 92)
|| (int) c == 39) != 0)
foo();
}
into:
define i32 @crud(i8 zeroext %c, i32 %x) nounwind ssp noredzone {
entry:
%cmp = icmp ult i8 %c, 33
br i1 %cmp, label %if.then, label %switch.early.test
switch.early.test: ; preds = %entry
switch i8 %c, label %if.end [
i8 39, label %if.then
i8 44, label %if.then
i8 58, label %if.then
i8 59, label %if.then
i8 60, label %if.then
i8 62, label %if.then
i8 46, label %if.then
i8 92, label %if.then
i8 34, label %if.then
]
by pulling the < comparison out ahead of the newly formed switch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121680 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-13 04:50:38 +00:00
|
|
|
define void @test7(i8 zeroext %c, i32 %x) nounwind ssp noredzone {
|
|
|
|
entry:
|
|
|
|
%cmp = icmp ult i32 %x, 32
|
|
|
|
%cmp4 = icmp eq i8 %c, 97
|
|
|
|
%or.cond = or i1 %cmp, %cmp4
|
|
|
|
%cmp9 = icmp eq i8 %c, 99
|
|
|
|
%or.cond11 = or i1 %or.cond, %cmp9
|
|
|
|
br i1 %or.cond11, label %if.then, label %if.end
|
|
|
|
|
|
|
|
if.then: ; preds = %entry
|
|
|
|
tail call void @foo1() nounwind noredzone
|
|
|
|
ret void
|
|
|
|
|
|
|
|
if.end: ; preds = %entry
|
|
|
|
ret void
|
2013-09-14 02:44:02 +00:00
|
|
|
|
2013-07-14 01:42:54 +00:00
|
|
|
; CHECK-LABEL: @test7(
|
2010-12-13 08:12:19 +00:00
|
|
|
; CHECK: %cmp = icmp ult i32 %x, 32
|
|
|
|
; CHECK: br i1 %cmp, label %if.then, label %switch.early.test
|
|
|
|
; CHECK: switch.early.test:
|
|
|
|
; CHECK: switch i8 %c, label %if.end [
|
|
|
|
; CHECK: i8 99, label %if.then
|
|
|
|
; CHECK: i8 97, label %if.then
|
|
|
|
; CHECK: ]
|
enhance the "change or icmp's into switch" xform to handle one value in an
'or sequence' that it doesn't understand. This allows us to optimize
something insane like this:
int crud (unsigned char c, unsigned x)
{
if(((((((((( (int) c <= 32 ||
(int) c == 46) || (int) c == 44)
|| (int) c == 58) || (int) c == 59) || (int) c == 60)
|| (int) c == 62) || (int) c == 34) || (int) c == 92)
|| (int) c == 39) != 0)
foo();
}
into:
define i32 @crud(i8 zeroext %c, i32 %x) nounwind ssp noredzone {
entry:
%cmp = icmp ult i8 %c, 33
br i1 %cmp, label %if.then, label %switch.early.test
switch.early.test: ; preds = %entry
switch i8 %c, label %if.end [
i8 39, label %if.then
i8 44, label %if.then
i8 58, label %if.then
i8 59, label %if.then
i8 60, label %if.then
i8 62, label %if.then
i8 46, label %if.then
i8 92, label %if.then
i8 34, label %if.then
]
by pulling the < comparison out ahead of the newly formed switch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121680 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-13 04:50:38 +00:00
|
|
|
}
|
2010-12-13 05:34:18 +00:00
|
|
|
|
|
|
|
define i32 @test8(i8 zeroext %c, i32 %x, i1 %C) nounwind ssp noredzone {
|
|
|
|
entry:
|
|
|
|
br i1 %C, label %N, label %if.then
|
|
|
|
N:
|
|
|
|
%cmp = icmp ult i32 %x, 32
|
|
|
|
%cmp4 = icmp eq i8 %c, 97
|
|
|
|
%or.cond = or i1 %cmp, %cmp4
|
|
|
|
%cmp9 = icmp eq i8 %c, 99
|
|
|
|
%or.cond11 = or i1 %or.cond, %cmp9
|
|
|
|
br i1 %or.cond11, label %if.then, label %if.end
|
|
|
|
|
|
|
|
if.then: ; preds = %entry
|
|
|
|
%A = phi i32 [0, %entry], [42, %N]
|
|
|
|
tail call void @foo1() nounwind noredzone
|
|
|
|
ret i32 %A
|
|
|
|
|
|
|
|
if.end: ; preds = %entry
|
|
|
|
ret i32 0
|
2013-09-14 02:44:02 +00:00
|
|
|
|
2013-07-14 01:42:54 +00:00
|
|
|
; CHECK-LABEL: @test8(
|
2010-12-13 08:12:19 +00:00
|
|
|
; CHECK: switch.early.test:
|
|
|
|
; CHECK: switch i8 %c, label %if.end [
|
|
|
|
; CHECK: i8 99, label %if.then
|
|
|
|
; CHECK: i8 97, label %if.then
|
|
|
|
; CHECK: ]
|
|
|
|
; CHECK: %A = phi i32 [ 0, %entry ], [ 42, %switch.early.test ], [ 42, %N ], [ 42, %switch.early.test ]
|
Make simplifycfg reprocess newly formed "br (cond1 | cond2)" conditions
when simplifying, allowing them to be eagerly turned into switches. This
is the last step required to get "Example 7" from this blog post:
http://blog.regehr.org/archives/320
On X86, we now generate this machine code, which (to my eye) seems better
than the ICC generated code:
_crud: ## @crud
## BB#0: ## %entry
cmpb $33, %dil
jb LBB0_4
## BB#1: ## %switch.early.test
addb $-34, %dil
cmpb $58, %dil
ja LBB0_3
## BB#2: ## %switch.early.test
movzbl %dil, %eax
movabsq $288230376537592865, %rcx ## imm = 0x400000017001421
btq %rax, %rcx
jb LBB0_4
LBB0_3: ## %lor.rhs
xorl %eax, %eax
ret
LBB0_4: ## %lor.end
movl $1, %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121690 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-13 07:00:06 +00:00
|
|
|
}
|
|
|
|
|
2010-12-13 07:41:29 +00:00
|
|
|
;; This is "Example 7" from http://blog.regehr.org/archives/320
|
Make simplifycfg reprocess newly formed "br (cond1 | cond2)" conditions
when simplifying, allowing them to be eagerly turned into switches. This
is the last step required to get "Example 7" from this blog post:
http://blog.regehr.org/archives/320
On X86, we now generate this machine code, which (to my eye) seems better
than the ICC generated code:
_crud: ## @crud
## BB#0: ## %entry
cmpb $33, %dil
jb LBB0_4
## BB#1: ## %switch.early.test
addb $-34, %dil
cmpb $58, %dil
ja LBB0_3
## BB#2: ## %switch.early.test
movzbl %dil, %eax
movabsq $288230376537592865, %rcx ## imm = 0x400000017001421
btq %rax, %rcx
jb LBB0_4
LBB0_3: ## %lor.rhs
xorl %eax, %eax
ret
LBB0_4: ## %lor.end
movl $1, %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121690 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-13 07:00:06 +00:00
|
|
|
define i32 @test9(i8 zeroext %c) nounwind ssp noredzone {
|
|
|
|
entry:
|
|
|
|
%cmp = icmp ult i8 %c, 33
|
|
|
|
br i1 %cmp, label %lor.end, label %lor.lhs.false
|
|
|
|
|
|
|
|
lor.lhs.false: ; preds = %entry
|
|
|
|
%cmp4 = icmp eq i8 %c, 46
|
|
|
|
br i1 %cmp4, label %lor.end, label %lor.lhs.false6
|
|
|
|
|
|
|
|
lor.lhs.false6: ; preds = %lor.lhs.false
|
|
|
|
%cmp9 = icmp eq i8 %c, 44
|
|
|
|
br i1 %cmp9, label %lor.end, label %lor.lhs.false11
|
|
|
|
|
|
|
|
lor.lhs.false11: ; preds = %lor.lhs.false6
|
|
|
|
%cmp14 = icmp eq i8 %c, 58
|
|
|
|
br i1 %cmp14, label %lor.end, label %lor.lhs.false16
|
|
|
|
|
|
|
|
lor.lhs.false16: ; preds = %lor.lhs.false11
|
|
|
|
%cmp19 = icmp eq i8 %c, 59
|
|
|
|
br i1 %cmp19, label %lor.end, label %lor.lhs.false21
|
|
|
|
|
|
|
|
lor.lhs.false21: ; preds = %lor.lhs.false16
|
|
|
|
%cmp24 = icmp eq i8 %c, 60
|
|
|
|
br i1 %cmp24, label %lor.end, label %lor.lhs.false26
|
|
|
|
|
|
|
|
lor.lhs.false26: ; preds = %lor.lhs.false21
|
|
|
|
%cmp29 = icmp eq i8 %c, 62
|
|
|
|
br i1 %cmp29, label %lor.end, label %lor.lhs.false31
|
2010-12-13 05:34:18 +00:00
|
|
|
|
Make simplifycfg reprocess newly formed "br (cond1 | cond2)" conditions
when simplifying, allowing them to be eagerly turned into switches. This
is the last step required to get "Example 7" from this blog post:
http://blog.regehr.org/archives/320
On X86, we now generate this machine code, which (to my eye) seems better
than the ICC generated code:
_crud: ## @crud
## BB#0: ## %entry
cmpb $33, %dil
jb LBB0_4
## BB#1: ## %switch.early.test
addb $-34, %dil
cmpb $58, %dil
ja LBB0_3
## BB#2: ## %switch.early.test
movzbl %dil, %eax
movabsq $288230376537592865, %rcx ## imm = 0x400000017001421
btq %rax, %rcx
jb LBB0_4
LBB0_3: ## %lor.rhs
xorl %eax, %eax
ret
LBB0_4: ## %lor.end
movl $1, %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121690 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-13 07:00:06 +00:00
|
|
|
lor.lhs.false31: ; preds = %lor.lhs.false26
|
|
|
|
%cmp34 = icmp eq i8 %c, 34
|
|
|
|
br i1 %cmp34, label %lor.end, label %lor.lhs.false36
|
|
|
|
|
|
|
|
lor.lhs.false36: ; preds = %lor.lhs.false31
|
|
|
|
%cmp39 = icmp eq i8 %c, 92
|
|
|
|
br i1 %cmp39, label %lor.end, label %lor.rhs
|
|
|
|
|
|
|
|
lor.rhs: ; preds = %lor.lhs.false36
|
|
|
|
%cmp43 = icmp eq i8 %c, 39
|
|
|
|
br label %lor.end
|
|
|
|
|
|
|
|
lor.end: ; preds = %lor.rhs, %lor.lhs.false36, %lor.lhs.false31, %lor.lhs.false26, %lor.lhs.false21, %lor.lhs.false16, %lor.lhs.false11, %lor.lhs.false6, %lor.lhs.false, %entry
|
|
|
|
%0 = phi i1 [ true, %lor.lhs.false36 ], [ true, %lor.lhs.false31 ], [ true, %lor.lhs.false26 ], [ true, %lor.lhs.false21 ], [ true, %lor.lhs.false16 ], [ true, %lor.lhs.false11 ], [ true, %lor.lhs.false6 ], [ true, %lor.lhs.false ], [ true, %entry ], [ %cmp43, %lor.rhs ]
|
|
|
|
%conv46 = zext i1 %0 to i32
|
|
|
|
ret i32 %conv46
|
2013-09-14 02:44:02 +00:00
|
|
|
|
2013-07-14 01:42:54 +00:00
|
|
|
; CHECK-LABEL: @test9(
|
2010-12-14 08:46:09 +00:00
|
|
|
; CHECK: %cmp = icmp ult i8 %c, 33
|
|
|
|
; CHECK: br i1 %cmp, label %lor.end, label %switch.early.test
|
|
|
|
|
|
|
|
; CHECK: switch.early.test:
|
|
|
|
; CHECK: switch i8 %c, label %lor.rhs [
|
|
|
|
; CHECK: i8 92, label %lor.end
|
|
|
|
; CHECK: i8 62, label %lor.end
|
|
|
|
; CHECK: i8 60, label %lor.end
|
|
|
|
; CHECK: i8 59, label %lor.end
|
|
|
|
; CHECK: i8 58, label %lor.end
|
|
|
|
; CHECK: i8 46, label %lor.end
|
|
|
|
; CHECK: i8 44, label %lor.end
|
|
|
|
; CHECK: i8 34, label %lor.end
|
|
|
|
; CHECK: i8 39, label %lor.end
|
|
|
|
; CHECK: ]
|
2010-12-13 05:34:18 +00:00
|
|
|
}
|
Make simplifycfg reprocess newly formed "br (cond1 | cond2)" conditions
when simplifying, allowing them to be eagerly turned into switches. This
is the last step required to get "Example 7" from this blog post:
http://blog.regehr.org/archives/320
On X86, we now generate this machine code, which (to my eye) seems better
than the ICC generated code:
_crud: ## @crud
## BB#0: ## %entry
cmpb $33, %dil
jb LBB0_4
## BB#1: ## %switch.early.test
addb $-34, %dil
cmpb $58, %dil
ja LBB0_3
## BB#2: ## %switch.early.test
movzbl %dil, %eax
movabsq $288230376537592865, %rcx ## imm = 0x400000017001421
btq %rax, %rcx
jb LBB0_4
LBB0_3: ## %lor.rhs
xorl %eax, %eax
ret
LBB0_4: ## %lor.end
movl $1, %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121690 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-13 07:00:06 +00:00
|
|
|
|
2010-12-13 08:12:19 +00:00
|
|
|
define i32 @test10(i32 %mode, i1 %Cond) {
|
|
|
|
%A = icmp ne i32 %mode, 0
|
|
|
|
%B = icmp ne i32 %mode, 51
|
|
|
|
%C = and i1 %A, %B
|
|
|
|
%D = and i1 %C, %Cond
|
|
|
|
br i1 %D, label %T, label %F
|
|
|
|
T:
|
|
|
|
ret i32 123
|
|
|
|
F:
|
|
|
|
ret i32 324
|
|
|
|
|
2013-07-14 01:42:54 +00:00
|
|
|
; CHECK-LABEL: @test10(
|
2010-12-13 08:12:19 +00:00
|
|
|
; CHECK: br i1 %Cond, label %switch.early.test, label %F
|
|
|
|
; CHECK:switch.early.test:
|
|
|
|
; CHECK: switch i32 %mode, label %T [
|
|
|
|
; CHECK: i32 51, label %F
|
|
|
|
; CHECK: i32 0, label %F
|
|
|
|
; CHECK: ]
|
|
|
|
}
|
|
|
|
|
2010-12-13 18:20:38 +00:00
|
|
|
; PR8780
|
|
|
|
define i32 @test11(i32 %bar) nounwind {
|
|
|
|
entry:
|
|
|
|
%cmp = icmp eq i32 %bar, 4
|
|
|
|
%cmp2 = icmp eq i32 %bar, 35
|
|
|
|
%or.cond = or i1 %cmp, %cmp2
|
|
|
|
%cmp5 = icmp eq i32 %bar, 53
|
|
|
|
%or.cond1 = or i1 %or.cond, %cmp5
|
|
|
|
%cmp8 = icmp eq i32 %bar, 24
|
|
|
|
%or.cond2 = or i1 %or.cond1, %cmp8
|
|
|
|
%cmp11 = icmp eq i32 %bar, 23
|
|
|
|
%or.cond3 = or i1 %or.cond2, %cmp11
|
|
|
|
%cmp14 = icmp eq i32 %bar, 55
|
|
|
|
%or.cond4 = or i1 %or.cond3, %cmp14
|
|
|
|
%cmp17 = icmp eq i32 %bar, 12
|
|
|
|
%or.cond5 = or i1 %or.cond4, %cmp17
|
|
|
|
%cmp20 = icmp eq i32 %bar, 35
|
|
|
|
%or.cond6 = or i1 %or.cond5, %cmp20
|
|
|
|
br i1 %or.cond6, label %if.then, label %if.end
|
2010-12-13 08:12:19 +00:00
|
|
|
|
2010-12-13 18:20:38 +00:00
|
|
|
if.then: ; preds = %entry
|
|
|
|
br label %return
|
Make simplifycfg reprocess newly formed "br (cond1 | cond2)" conditions
when simplifying, allowing them to be eagerly turned into switches. This
is the last step required to get "Example 7" from this blog post:
http://blog.regehr.org/archives/320
On X86, we now generate this machine code, which (to my eye) seems better
than the ICC generated code:
_crud: ## @crud
## BB#0: ## %entry
cmpb $33, %dil
jb LBB0_4
## BB#1: ## %switch.early.test
addb $-34, %dil
cmpb $58, %dil
ja LBB0_3
## BB#2: ## %switch.early.test
movzbl %dil, %eax
movabsq $288230376537592865, %rcx ## imm = 0x400000017001421
btq %rax, %rcx
jb LBB0_4
LBB0_3: ## %lor.rhs
xorl %eax, %eax
ret
LBB0_4: ## %lor.end
movl $1, %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121690 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-13 07:00:06 +00:00
|
|
|
|
2010-12-13 18:20:38 +00:00
|
|
|
if.end: ; preds = %entry
|
|
|
|
br label %return
|
|
|
|
|
|
|
|
return: ; preds = %if.end, %if.then
|
|
|
|
%retval.0 = phi i32 [ 1, %if.then ], [ 0, %if.end ]
|
|
|
|
ret i32 %retval.0
|
|
|
|
|
2013-07-14 01:42:54 +00:00
|
|
|
; CHECK-LABEL: @test11(
|
2010-12-13 18:20:38 +00:00
|
|
|
; CHECK: switch i32 %bar, label %if.end [
|
|
|
|
; CHECK: i32 55, label %return
|
|
|
|
; CHECK: i32 53, label %return
|
|
|
|
; CHECK: i32 35, label %return
|
|
|
|
; CHECK: i32 24, label %return
|
|
|
|
; CHECK: i32 23, label %return
|
|
|
|
; CHECK: i32 12, label %return
|
|
|
|
; CHECK: i32 4, label %return
|
|
|
|
; CHECK: ]
|
|
|
|
}
|
2010-12-13 23:02:19 +00:00
|
|
|
|
|
|
|
define void @test12() nounwind {
|
|
|
|
entry:
|
|
|
|
br label %bb49.us.us
|
|
|
|
|
|
|
|
bb49.us.us:
|
|
|
|
%A = icmp eq i32 undef, undef
|
|
|
|
br i1 %A, label %bb55.us.us, label %malformed
|
|
|
|
|
|
|
|
bb48.us.us:
|
|
|
|
%B = icmp ugt i32 undef, undef
|
|
|
|
br i1 %B, label %bb55.us.us, label %bb49.us.us
|
|
|
|
|
|
|
|
bb55.us.us:
|
|
|
|
br label %bb48.us.us
|
|
|
|
|
|
|
|
malformed:
|
|
|
|
ret void
|
2013-07-14 01:42:54 +00:00
|
|
|
; CHECK-LABEL: @test12(
|
2010-12-13 23:02:19 +00:00
|
|
|
|
improve switch formation to handle small range
comparisons formed by comparisons. For example,
this:
void foo(unsigned x) {
if (x == 0 || x == 1 || x == 3 || x == 4 || x == 6)
bar();
}
compiles into:
_foo: ## @foo
## BB#0: ## %entry
cmpl $6, %edi
ja LBB0_2
## BB#1: ## %entry
movl %edi, %eax
movl $91, %ecx
btq %rax, %rcx
jb LBB0_3
instead of:
_foo: ## @foo
## BB#0: ## %entry
cmpl $2, %edi
jb LBB0_4
## BB#1: ## %switch.early.test
cmpl $6, %edi
ja LBB0_3
## BB#2: ## %switch.early.test
movl %edi, %eax
movl $88, %ecx
btq %rax, %rcx
jb LBB0_4
This catches a bunch of cases in GCC, which look like this:
%804 = load i32* @which_alternative, align 4, !tbaa !0
%805 = icmp ult i32 %804, 2
%806 = icmp eq i32 %804, 3
%or.cond121 = or i1 %805, %806
%807 = icmp eq i32 %804, 4
%or.cond124 = or i1 %or.cond121, %807
br i1 %or.cond124, label %.thread, label %808
turning this into a range comparison.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122045 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 06:20:15 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
; test13 - handle switch formation with ult.
|
|
|
|
define void @test13(i32 %x) nounwind ssp noredzone {
|
|
|
|
entry:
|
|
|
|
%cmp = icmp ult i32 %x, 2
|
|
|
|
br i1 %cmp, label %if.then, label %lor.lhs.false3
|
|
|
|
|
|
|
|
lor.lhs.false3: ; preds = %lor.lhs.false
|
|
|
|
%cmp5 = icmp eq i32 %x, 3
|
|
|
|
br i1 %cmp5, label %if.then, label %lor.lhs.false6
|
|
|
|
|
|
|
|
lor.lhs.false6: ; preds = %lor.lhs.false3
|
|
|
|
%cmp8 = icmp eq i32 %x, 4
|
|
|
|
br i1 %cmp8, label %if.then, label %lor.lhs.false9
|
|
|
|
|
|
|
|
lor.lhs.false9: ; preds = %lor.lhs.false6
|
|
|
|
%cmp11 = icmp eq i32 %x, 6
|
|
|
|
br i1 %cmp11, label %if.then, label %if.end
|
|
|
|
|
|
|
|
if.then: ; preds = %lor.lhs.false9, %lor.lhs.false6, %lor.lhs.false3, %lor.lhs.false, %entry
|
|
|
|
call void @foo1() noredzone
|
|
|
|
br label %if.end
|
|
|
|
|
|
|
|
if.end: ; preds = %if.then, %lor.lhs.false9
|
|
|
|
ret void
|
2013-07-14 01:42:54 +00:00
|
|
|
; CHECK-LABEL: @test13(
|
improve switch formation to handle small range
comparisons formed by comparisons. For example,
this:
void foo(unsigned x) {
if (x == 0 || x == 1 || x == 3 || x == 4 || x == 6)
bar();
}
compiles into:
_foo: ## @foo
## BB#0: ## %entry
cmpl $6, %edi
ja LBB0_2
## BB#1: ## %entry
movl %edi, %eax
movl $91, %ecx
btq %rax, %rcx
jb LBB0_3
instead of:
_foo: ## @foo
## BB#0: ## %entry
cmpl $2, %edi
jb LBB0_4
## BB#1: ## %switch.early.test
cmpl $6, %edi
ja LBB0_3
## BB#2: ## %switch.early.test
movl %edi, %eax
movl $88, %ecx
btq %rax, %rcx
jb LBB0_4
This catches a bunch of cases in GCC, which look like this:
%804 = load i32* @which_alternative, align 4, !tbaa !0
%805 = icmp ult i32 %804, 2
%806 = icmp eq i32 %804, 3
%or.cond121 = or i1 %805, %806
%807 = icmp eq i32 %804, 4
%or.cond124 = or i1 %or.cond121, %807
br i1 %or.cond124, label %.thread, label %808
turning this into a range comparison.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122045 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 06:20:15 +00:00
|
|
|
; CHECK: switch i32 %x, label %if.end [
|
|
|
|
; CHECK: i32 6, label %if.then
|
|
|
|
; CHECK: i32 4, label %if.then
|
|
|
|
; CHECK: i32 3, label %if.then
|
|
|
|
; CHECK: i32 1, label %if.then
|
|
|
|
; CHECK: i32 0, label %if.then
|
|
|
|
; CHECK: ]
|
|
|
|
}
|
|
|
|
|
|
|
|
; test14 - handle switch formation with ult.
|
|
|
|
define void @test14(i32 %x) nounwind ssp noredzone {
|
|
|
|
entry:
|
|
|
|
%cmp = icmp ugt i32 %x, 2
|
|
|
|
br i1 %cmp, label %lor.lhs.false3, label %if.then
|
|
|
|
|
|
|
|
lor.lhs.false3: ; preds = %lor.lhs.false
|
|
|
|
%cmp5 = icmp ne i32 %x, 3
|
|
|
|
br i1 %cmp5, label %lor.lhs.false6, label %if.then
|
|
|
|
|
|
|
|
lor.lhs.false6: ; preds = %lor.lhs.false3
|
|
|
|
%cmp8 = icmp ne i32 %x, 4
|
|
|
|
br i1 %cmp8, label %lor.lhs.false9, label %if.then
|
|
|
|
|
|
|
|
lor.lhs.false9: ; preds = %lor.lhs.false6
|
|
|
|
%cmp11 = icmp ne i32 %x, 6
|
|
|
|
br i1 %cmp11, label %if.end, label %if.then
|
|
|
|
|
|
|
|
if.then: ; preds = %lor.lhs.false9, %lor.lhs.false6, %lor.lhs.false3, %lor.lhs.false, %entry
|
|
|
|
call void @foo1() noredzone
|
|
|
|
br label %if.end
|
|
|
|
|
|
|
|
if.end: ; preds = %if.then, %lor.lhs.false9
|
|
|
|
ret void
|
2013-07-14 01:42:54 +00:00
|
|
|
; CHECK-LABEL: @test14(
|
improve switch formation to handle small range
comparisons formed by comparisons. For example,
this:
void foo(unsigned x) {
if (x == 0 || x == 1 || x == 3 || x == 4 || x == 6)
bar();
}
compiles into:
_foo: ## @foo
## BB#0: ## %entry
cmpl $6, %edi
ja LBB0_2
## BB#1: ## %entry
movl %edi, %eax
movl $91, %ecx
btq %rax, %rcx
jb LBB0_3
instead of:
_foo: ## @foo
## BB#0: ## %entry
cmpl $2, %edi
jb LBB0_4
## BB#1: ## %switch.early.test
cmpl $6, %edi
ja LBB0_3
## BB#2: ## %switch.early.test
movl %edi, %eax
movl $88, %ecx
btq %rax, %rcx
jb LBB0_4
This catches a bunch of cases in GCC, which look like this:
%804 = load i32* @which_alternative, align 4, !tbaa !0
%805 = icmp ult i32 %804, 2
%806 = icmp eq i32 %804, 3
%or.cond121 = or i1 %805, %806
%807 = icmp eq i32 %804, 4
%or.cond124 = or i1 %or.cond121, %807
br i1 %or.cond124, label %.thread, label %808
turning this into a range comparison.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122045 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 06:20:15 +00:00
|
|
|
; CHECK: switch i32 %x, label %if.end [
|
|
|
|
; CHECK: i32 6, label %if.then
|
|
|
|
; CHECK: i32 4, label %if.then
|
|
|
|
; CHECK: i32 3, label %if.then
|
|
|
|
; CHECK: i32 1, label %if.then
|
|
|
|
; CHECK: i32 0, label %if.then
|
|
|
|
; CHECK: ]
|
|
|
|
}
|
|
|
|
|
2010-12-17 10:48:14 +00:00
|
|
|
; Don't crash on ginormous ranges.
|
|
|
|
define void @test15(i128 %x) nounwind {
|
|
|
|
%cmp = icmp ugt i128 %x, 2
|
|
|
|
br i1 %cmp, label %if.end, label %lor.false
|
|
|
|
|
|
|
|
lor.false:
|
|
|
|
%cmp2 = icmp ne i128 %x, 100000000000000000000
|
|
|
|
br i1 %cmp2, label %if.end, label %if.then
|
|
|
|
|
|
|
|
if.then:
|
|
|
|
call void @foo1() noredzone
|
|
|
|
br label %if.end
|
|
|
|
|
|
|
|
if.end:
|
|
|
|
ret void
|
|
|
|
|
2013-07-14 01:42:54 +00:00
|
|
|
; CHECK-LABEL: @test15(
|
2010-12-17 10:48:14 +00:00
|
|
|
; CHECK-NOT: switch
|
|
|
|
; CHECK: ret void
|
|
|
|
}
|
2011-01-29 04:46:23 +00:00
|
|
|
|
|
|
|
; PR8675
|
|
|
|
; rdar://5134905
|
|
|
|
define zeroext i1 @test16(i32 %x) nounwind {
|
|
|
|
entry:
|
2013-07-14 01:42:54 +00:00
|
|
|
; CHECK-LABEL: @test16(
|
2011-02-07 22:37:28 +00:00
|
|
|
; CHECK: %x.off = add i32 %x, -1
|
|
|
|
; CHECK: %switch = icmp ult i32 %x.off, 3
|
2011-01-29 04:46:23 +00:00
|
|
|
%cmp.i = icmp eq i32 %x, 1
|
|
|
|
br i1 %cmp.i, label %lor.end, label %lor.lhs.false
|
|
|
|
|
|
|
|
lor.lhs.false:
|
|
|
|
%cmp.i2 = icmp eq i32 %x, 2
|
|
|
|
br i1 %cmp.i2, label %lor.end, label %lor.rhs
|
|
|
|
|
|
|
|
lor.rhs:
|
|
|
|
%cmp.i1 = icmp eq i32 %x, 3
|
|
|
|
br label %lor.end
|
|
|
|
|
|
|
|
lor.end:
|
|
|
|
%0 = phi i1 [ true, %lor.lhs.false ], [ true, %entry ], [ %cmp.i1, %lor.rhs ]
|
|
|
|
ret i1 %0
|
|
|
|
}
|
2011-02-07 22:37:28 +00:00
|
|
|
|
|
|
|
; Check that we don't turn an icmp into a switch where it's not useful.
|
|
|
|
define void @test17(i32 %x, i32 %y) {
|
|
|
|
%cmp = icmp ult i32 %x, 3
|
|
|
|
%switch = icmp ult i32 %y, 2
|
|
|
|
%or.cond775 = or i1 %cmp, %switch
|
|
|
|
br i1 %or.cond775, label %lor.lhs.false8, label %return
|
|
|
|
|
|
|
|
lor.lhs.false8:
|
|
|
|
tail call void @foo1()
|
|
|
|
ret void
|
|
|
|
|
|
|
|
return:
|
|
|
|
ret void
|
|
|
|
|
2013-07-14 01:42:54 +00:00
|
|
|
; CHECK-LABEL: @test17(
|
2011-02-07 22:37:28 +00:00
|
|
|
; CHECK-NOT: switch.early.test
|
|
|
|
; CHECK-NOT: switch i32
|
|
|
|
; CHECK: ret void
|
|
|
|
}
|
|
|
|
|
2013-07-04 14:22:02 +00:00
|
|
|
define void @test18(i32 %arg) {
|
|
|
|
bb:
|
|
|
|
%tmp = and i32 %arg, -2
|
|
|
|
%tmp1 = icmp eq i32 %tmp, 8
|
|
|
|
%tmp2 = icmp eq i32 %arg, 10
|
|
|
|
%tmp3 = or i1 %tmp1, %tmp2
|
|
|
|
%tmp4 = icmp eq i32 %arg, 11
|
|
|
|
%tmp5 = or i1 %tmp3, %tmp4
|
|
|
|
%tmp6 = icmp eq i32 %arg, 12
|
|
|
|
%tmp7 = or i1 %tmp5, %tmp6
|
|
|
|
br i1 %tmp7, label %bb19, label %bb8
|
|
|
|
|
|
|
|
bb8: ; preds = %bb
|
|
|
|
%tmp9 = add i32 %arg, -13
|
|
|
|
%tmp10 = icmp ult i32 %tmp9, 2
|
|
|
|
%tmp11 = icmp eq i32 %arg, 16
|
|
|
|
%tmp12 = or i1 %tmp10, %tmp11
|
|
|
|
%tmp13 = icmp eq i32 %arg, 17
|
|
|
|
%tmp14 = or i1 %tmp12, %tmp13
|
|
|
|
%tmp15 = icmp eq i32 %arg, 18
|
|
|
|
%tmp16 = or i1 %tmp14, %tmp15
|
|
|
|
%tmp17 = icmp eq i32 %arg, 15
|
|
|
|
%tmp18 = or i1 %tmp16, %tmp17
|
|
|
|
br i1 %tmp18, label %bb19, label %bb20
|
|
|
|
|
|
|
|
bb19: ; preds = %bb8, %bb
|
|
|
|
tail call void @foo1()
|
|
|
|
br label %bb20
|
|
|
|
|
|
|
|
bb20: ; preds = %bb19, %bb8
|
|
|
|
ret void
|
|
|
|
|
2013-07-14 01:42:54 +00:00
|
|
|
; CHECK-LABEL: @test18(
|
2013-07-04 14:22:02 +00:00
|
|
|
; CHECK: %arg.off = add i32 %arg, -8
|
|
|
|
; CHECK: icmp ult i32 %arg.off, 11
|
|
|
|
}
|