llvm-6502/test/CodeGen/Mips/2008-07-06-fadd64.ll

; RUN: llc -march=mips -mattr=single-float  < %s | FileCheck %s

define double @dofloat(double %a, double %b) nounwind {
entry:
; CHECK: __adddf3
	fadd double %a, %b		; <double>:0 [#uses=1]
	ret double %0
}
Re-enable some of the disabled tests. Use FileCheck instead of grep to check output. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140263 91177308-0d34-0410-b5e6-96231b3b80d8 2011-09-21 17:36:30 +00:00			`; RUN: llc -march=mips -mattr=single-float < %s \| FileCheck %s`
Batch 2 of Mips CodeGen tests git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54507 91177308-0d34-0410-b5e6-96231b3b80d8 2008-08-08 04:03:25 +00:00
			`define double @dofloat(double %a, double %b) nounwind {`
			`entry:`
Re-enable some of the disabled tests. Use FileCheck instead of grep to check output. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140263 91177308-0d34-0410-b5e6-96231b3b80d8 2011-09-21 17:36:30 +00:00			`; CHECK: __adddf3`
Split the Add, Sub, and Mul instruction opcodes into separate integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8 2009-06-04 22:49:04 +00:00			`fadd double %a, %b ; <double>:0 [#uses=1]`
Batch 2 of Mips CodeGen tests git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54507 91177308-0d34-0410-b5e6-96231b3b80d8 2008-08-08 04:03:25 +00:00			`ret double %0`
			`}`