llvm-6502/test/CodeGen/Thumb2/2010-05-24-rsbs.ll

; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s
; Radar 8017376: Missing 's' suffix for t2RSBS instructions.
; CHECK: rsbs

define i64 @test(i64 %x) nounwind readnone {
entry:
  %0 = sub nsw i64 1, %x                          ; <i64> [#uses=1]
  ret i64 %0
}
Thumb2 RSBS instructions were being printed without the 'S' suffix. Fix it by changing the T2I_rbin_s_is multiclass to handle the CPSR output and 'S' suffix in the same way as T2I_bin_s_irs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104531 91177308-0d34-0410-b5e6-96231b3b80d8 2010-05-24 18:44:06 +00:00			`; RUN: llc < %s -mtriple=thumbv7-apple-darwin \| FileCheck %s`
			`; Radar 8017376: Missing 's' suffix for t2RSBS instructions.`
			`; CHECK: rsbs`

Remove arm_apcscc from the test files. It is the default and doing this matches what llvm-gcc and clang now produce. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106221 91177308-0d34-0410-b5e6-96231b3b80d8 2010-06-17 15:18:27 +00:00			`define i64 @test(i64 %x) nounwind readnone {`
Thumb2 RSBS instructions were being printed without the 'S' suffix. Fix it by changing the T2I_rbin_s_is multiclass to handle the CPSR output and 'S' suffix in the same way as T2I_bin_s_irs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104531 91177308-0d34-0410-b5e6-96231b3b80d8 2010-05-24 18:44:06 +00:00			`entry:`
			`%0 = sub nsw i64 1, %x ; <i64> [#uses=1]`
			`ret i64 %0`
			`}`