llvm-6502/test/MC/AArch64/arm64-bitfield-encoding.s

; RUN: llvm-mc -triple arm64-apple-darwin -show-encoding < %s | FileCheck %s

foo:
;==---------------------------------------------------------------------------==
; 5.4.4 Bitfield Operations
;==---------------------------------------------------------------------------==

  bfm  w1, w2, #1, #15
  bfm  x1, x2, #1, #15
  sbfm w1, w2, #1, #15
  sbfm x1, x2, #1, #15
  ubfm w1, w2, #1, #15
  ubfm x1, x2, #1, #15
  sbfiz wzr, w0, #31, #1
  sbfiz xzr, x0, #31, #1
  ubfiz wzr, w0, #31, #1
  ubfiz xzr, x0, #31, #1

; CHECK: bfxil w1, w2, #1, #15       ; encoding: [0x41,0x3c,0x01,0x33]
; CHECK: bfxil x1, x2, #1, #15       ; encoding: [0x41,0x3c,0x41,0xb3]
; CHECK: sbfx w1, w2, #1, #15        ; encoding: [0x41,0x3c,0x01,0x13]
; CHECK: sbfx x1, x2, #1, #15        ; encoding: [0x41,0x3c,0x41,0x93]
; CHECK: ubfx w1, w2, #1, #15        ; encoding: [0x41,0x3c,0x01,0x53]
; CHECK: ubfx x1, x2, #1, #15        ; encoding: [0x41,0x3c,0x41,0xd3]
; CHECK: sbfiz wzr, w0, #31, #1      ; encoding: [0x1f,0x00,0x01,0x13]
; CHECK: sbfiz xzr, x0, #31, #1      ; encoding: [0x1f,0x00,0x61,0x93]
; CHECK: lsl  wzr, w0, #31           ; encoding: [0x1f,0x00,0x01,0x53]
; CHECK: ubfiz xzr, x0, #31, #1      ; encoding: [0x1f,0x00,0x61,0xd3]

;==---------------------------------------------------------------------------==
; 5.4.5 Extract (immediate)
;==---------------------------------------------------------------------------==

  extr w1, w2, w3, #15
  extr x2, x3, x4, #1

; CHECK: extr w1, w2, w3, #15        ; encoding: [0x41,0x3c,0x83,0x13]
; CHECK: extr x2, x3, x4, #1         ; encoding: [0x62,0x04,0xc4,0x93]
ARM64: initial backend import This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8 2014-03-29 10:18:08 +00:00			`; RUN: llvm-mc -triple arm64-apple-darwin -show-encoding < %s \| FileCheck %s`

			`foo:`
			`;==---------------------------------------------------------------------------==`
			`; 5.4.4 Bitfield Operations`
			`;==---------------------------------------------------------------------------==`

			`bfm w1, w2, #1, #15`
			`bfm x1, x2, #1, #15`
			`sbfm w1, w2, #1, #15`
			`sbfm x1, x2, #1, #15`
			`ubfm w1, w2, #1, #15`
			`ubfm x1, x2, #1, #15`
[ARM64] Add WZR to isGPR32Register, since every use needs to check for this anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205871 91177308-0d34-0410-b5e6-96231b3b80d8 2014-04-09 14:42:49 +00:00			`sbfiz wzr, w0, #31, #1`
			`sbfiz xzr, x0, #31, #1`
			`ubfiz wzr, w0, #31, #1`
			`ubfiz xzr, x0, #31, #1`
ARM64: initial backend import This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8 2014-03-29 10:18:08 +00:00
AArch64/ARM64: print BFM instructions as BFI or BFXIL The canonical form of the BFM instruction is always one of the more explicit extract or insert operations, which makes reading output much easier. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207752 91177308-0d34-0410-b5e6-96231b3b80d8 2014-05-01 12:29:38 +00:00			`; CHECK: bfxil w1, w2, #1, #15 ; encoding: [0x41,0x3c,0x01,0x33]`
			`; CHECK: bfxil x1, x2, #1, #15 ; encoding: [0x41,0x3c,0x41,0xb3]`
[ARM64] Print preferred aliases for SFBM/UBFM in InstPrinter git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207219 91177308-0d34-0410-b5e6-96231b3b80d8 2014-04-25 10:25:29 +00:00			`; CHECK: sbfx w1, w2, #1, #15 ; encoding: [0x41,0x3c,0x01,0x13]`
			`; CHECK: sbfx x1, x2, #1, #15 ; encoding: [0x41,0x3c,0x41,0x93]`
			`; CHECK: ubfx w1, w2, #1, #15 ; encoding: [0x41,0x3c,0x01,0x53]`
			`; CHECK: ubfx x1, x2, #1, #15 ; encoding: [0x41,0x3c,0x41,0xd3]`
			`; CHECK: sbfiz wzr, w0, #31, #1 ; encoding: [0x1f,0x00,0x01,0x13]`
			`; CHECK: sbfiz xzr, x0, #31, #1 ; encoding: [0x1f,0x00,0x61,0x93]`
[ARM64] Add WZR to isGPR32Register, since every use needs to check for this anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205871 91177308-0d34-0410-b5e6-96231b3b80d8 2014-04-09 14:42:49 +00:00			`; CHECK: lsl wzr, w0, #31 ; encoding: [0x1f,0x00,0x01,0x53]`
[ARM64] Print preferred aliases for SFBM/UBFM in InstPrinter git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207219 91177308-0d34-0410-b5e6-96231b3b80d8 2014-04-25 10:25:29 +00:00			`; CHECK: ubfiz xzr, x0, #31, #1 ; encoding: [0x1f,0x00,0x61,0xd3]`
ARM64: initial backend import This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8 2014-03-29 10:18:08 +00:00
			`;==---------------------------------------------------------------------------==`
			`; 5.4.5 Extract (immediate)`
			`;==---------------------------------------------------------------------------==`

			`extr w1, w2, w3, #15`
			`extr x2, x3, x4, #1`

			`; CHECK: extr w1, w2, w3, #15 ; encoding: [0x41,0x3c,0x83,0x13]`
			`; CHECK: extr x2, x3, x4, #1 ; encoding: [0x62,0x04,0xc4,0x93]`