mirror of
https://github.com/c64scene-ar/llvm-6502.git
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94 lines
2.5 KiB
LLVM
94 lines
2.5 KiB
LLVM
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; RUN: llc -mtriple=i686-pc-win32 -mattr=+sse2 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=X86
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; RUN: llc -mtriple=x86_64-pc-win32 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=X64
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; Test integer arguments.
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define x86_vectorcallcc i32 @test_int_1() {
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ret i32 0
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}
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; CHECK-LABEL: {{^}}test_int_1@@0:
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; CHECK: xorl %eax, %eax
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define x86_vectorcallcc i32 @test_int_2(i32 inreg %a) {
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ret i32 %a
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}
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; X86-LABEL: {{^}}test_int_2@@4:
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; X64-LABEL: {{^}}test_int_2@@8:
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; CHECK: movl %ecx, %eax
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define x86_vectorcallcc i32 @test_int_3(i64 inreg %a) {
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%at = trunc i64 %a to i32
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ret i32 %at
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}
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; X86-LABEL: {{^}}test_int_3@@8:
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; X64-LABEL: {{^}}test_int_3@@8:
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; CHECK: movl %ecx, %eax
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define x86_vectorcallcc i32 @test_int_4(i32 inreg %a, i32 inreg %b) {
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%s = add i32 %a, %b
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ret i32 %s
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}
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; X86-LABEL: {{^}}test_int_4@@8:
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; X86: leal (%ecx,%edx), %eax
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; X64-LABEL: {{^}}test_int_4@@16:
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; X64: leal (%rcx,%rdx), %eax
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define x86_vectorcallcc i32 @"\01test_int_5"(i32, i32) {
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ret i32 0
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}
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; CHECK-LABEL: {{^}}test_int_5:
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define x86_vectorcallcc double @test_fp_1(double %a, double %b) {
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ret double %b
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}
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; CHECK-LABEL: {{^}}test_fp_1@@16:
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; CHECK: movaps %xmm1, %xmm0
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define x86_vectorcallcc double @test_fp_2(
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double, double, double, double, double, double, double %r) {
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ret double %r
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}
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; CHECK-LABEL: {{^}}test_fp_2@@56:
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; CHECK: movsd {{[0-9]+\(%[re]sp\)}}, %xmm0
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define x86_vectorcallcc {double, double, double, double} @test_fp_3() {
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ret {double, double, double, double}
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{ double 0.0, double 0.0, double 0.0, double 0.0 }
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}
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; CHECK-LABEL: {{^}}test_fp_3@@0:
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; CHECK: xorps %xmm0
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; CHECK: xorps %xmm1
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; CHECK: xorps %xmm2
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; CHECK: xorps %xmm3
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; FIXME: Returning via x87 isn't compatible, but its hard to structure the
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; tablegen any other way.
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define x86_vectorcallcc {double, double, double, double, double} @test_fp_4() {
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ret {double, double, double, double, double}
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{ double 0.0, double 0.0, double 0.0, double 0.0, double 0.0 }
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}
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; CHECK-LABEL: {{^}}test_fp_4@@0:
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; CHECK: fldz
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; CHECK: xorps %xmm0
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; CHECK: xorps %xmm1
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; CHECK: xorps %xmm2
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; CHECK: xorps %xmm3
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define x86_vectorcallcc <16 x i8> @test_vec_1(<16 x i8> %a, <16 x i8> %b) {
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ret <16 x i8> %b
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}
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; CHECK-LABEL: {{^}}test_vec_1@@32:
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; CHECK: movaps %xmm1, %xmm0
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define x86_vectorcallcc <16 x i8> @test_vec_2(
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double, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> %r) {
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ret <16 x i8> %r
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}
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; CHECK-LABEL: {{^}}test_vec_2@@104:
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; CHECK: movaps (%{{[re]}}cx), %xmm0
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