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https://github.com/c64scene-ar/llvm-6502.git
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71 lines
2.9 KiB
LLVM
71 lines
2.9 KiB
LLVM
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; RUN: llc < %s -mtriple=powerpc-apple-darwin10.0
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; rdar://7819990
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%0 = type { i32 }
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%1 = type { i64 }
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%struct.Buffer = type { [1024 x i8], i64, i64, i64 }
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%struct.InStream = type { %struct.Buffer, %0, %1, i32*, %struct.InStreamMethods* }
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%struct.InStreamMethods = type { void (%struct.InStream*, i8*, i32)*, void (%struct.InStream*, i64)*, i64 (%struct.InStream*)*, void (%struct.InStream*)* }
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define i64 @t(%struct.InStream* %is) nounwind optsize ssp {
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entry:
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br i1 undef, label %is_read_byte.exit, label %bb.i
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bb.i: ; preds = %entry
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br label %is_read_byte.exit
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is_read_byte.exit: ; preds = %bb.i, %entry
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br i1 undef, label %is_read_byte.exit22, label %bb.i21
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bb.i21: ; preds = %is_read_byte.exit
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unreachable
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is_read_byte.exit22: ; preds = %is_read_byte.exit
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br i1 undef, label %is_read_byte.exit19, label %bb.i18
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bb.i18: ; preds = %is_read_byte.exit22
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br label %is_read_byte.exit19
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is_read_byte.exit19: ; preds = %bb.i18, %is_read_byte.exit22
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br i1 undef, label %is_read_byte.exit16, label %bb.i15
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bb.i15: ; preds = %is_read_byte.exit19
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unreachable
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is_read_byte.exit16: ; preds = %is_read_byte.exit19
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%0 = shl i64 undef, 32 ; <i64> [#uses=1]
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br i1 undef, label %is_read_byte.exit13, label %bb.i12
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bb.i12: ; preds = %is_read_byte.exit16
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unreachable
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is_read_byte.exit13: ; preds = %is_read_byte.exit16
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%1 = shl i64 undef, 24 ; <i64> [#uses=1]
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br i1 undef, label %is_read_byte.exit10, label %bb.i9
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bb.i9: ; preds = %is_read_byte.exit13
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unreachable
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is_read_byte.exit10: ; preds = %is_read_byte.exit13
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%2 = shl i64 undef, 16 ; <i64> [#uses=1]
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br i1 undef, label %is_read_byte.exit7, label %bb.i6
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bb.i6: ; preds = %is_read_byte.exit10
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br label %is_read_byte.exit7
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is_read_byte.exit7: ; preds = %bb.i6, %is_read_byte.exit10
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%3 = shl i64 undef, 8 ; <i64> [#uses=1]
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br i1 undef, label %is_read_byte.exit4, label %bb.i3
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bb.i3: ; preds = %is_read_byte.exit7
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unreachable
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is_read_byte.exit4: ; preds = %is_read_byte.exit7
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%4 = or i64 0, %0 ; <i64> [#uses=1]
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%5 = or i64 %4, %1 ; <i64> [#uses=1]
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%6 = or i64 %5, %2 ; <i64> [#uses=1]
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%7 = or i64 %6, %3 ; <i64> [#uses=1]
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%8 = or i64 %7, 0 ; <i64> [#uses=1]
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ret i64 %8
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}
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