2008-05-13 09:02:57 +00:00
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the interfaces that PIC16 uses to lower LLVM code into a
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// selection DAG.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "pic16-lower"
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#include "PIC16ISelLowering.h"
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#include "PIC16TargetMachine.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/GlobalValue.h"
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2008-05-13 09:02:57 +00:00
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#include "llvm/Function.h"
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2009-01-13 19:18:47 +00:00
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#include "llvm/CallingConv.h"
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2008-05-13 09:02:57 +00:00
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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2008-11-28 10:20:03 +00:00
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#include <cstdio>
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2008-05-13 09:02:57 +00:00
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2008-11-19 11:00:54 +00:00
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using namespace llvm;
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2008-05-13 09:02:57 +00:00
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2008-11-19 11:00:54 +00:00
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// PIC16TargetLowering Constructor.
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PIC16TargetLowering::PIC16TargetLowering(PIC16TargetMachine &TM)
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: TargetLowering(TM) {
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2008-05-13 09:02:57 +00:00
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2008-11-19 11:00:54 +00:00
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Subtarget = &TM.getSubtarget<PIC16Subtarget>();
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addRegisterClass(MVT::i8, PIC16::GPRRegisterClass);
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setShiftAmountType(MVT::i8);
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setShiftAmountFlavor(Extend);
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2009-01-13 19:18:47 +00:00
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// SRA library call names
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setPIC16LibcallName(PIC16ISD::SRA_I8, "__intrinsics.sra.i8");
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setLibcallName(RTLIB::SRA_I16, "__intrinsics.sra.i16");
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setLibcallName(RTLIB::SRA_I32, "__intrinsics.sra.i32");
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2009-01-21 05:44:05 +00:00
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// SHL library call names
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setPIC16LibcallName(PIC16ISD::SLL_I8, "__intrinsics.sll.i8");
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setLibcallName(RTLIB::SHL_I16, "__intrinsics.sll.i16");
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setLibcallName(RTLIB::SHL_I32, "__intrinsics.sll.i32");
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// SRL library call names
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setPIC16LibcallName(PIC16ISD::SRL_I8, "__intrinsics.srl.i8");
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setLibcallName(RTLIB::SRL_I16, "__intrinsics.srl.i16");
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setLibcallName(RTLIB::SRL_I32, "__intrinsics.srl.i32");
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// MUL Library call names
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setPIC16LibcallName(PIC16ISD::MUL_I8, "__intrinsics.mul.i8");
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setLibcallName(RTLIB::MUL_I16, "__intrinsics.mul.i16");
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setLibcallName(RTLIB::MUL_I32, "__intrinsics.mul.i32");
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setOperationAction(ISD::GlobalAddress, MVT::i16, Custom);
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setOperationAction(ISD::ExternalSymbol, MVT::i16, Custom);
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setOperationAction(ISD::LOAD, MVT::i8, Legal);
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setOperationAction(ISD::LOAD, MVT::i16, Custom);
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setOperationAction(ISD::LOAD, MVT::i32, Custom);
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setOperationAction(ISD::STORE, MVT::i8, Legal);
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setOperationAction(ISD::STORE, MVT::i16, Custom);
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setOperationAction(ISD::STORE, MVT::i32, Custom);
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setOperationAction(ISD::ADDE, MVT::i8, Custom);
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setOperationAction(ISD::ADDC, MVT::i8, Custom);
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setOperationAction(ISD::SUBE, MVT::i8, Custom);
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setOperationAction(ISD::SUBC, MVT::i8, Custom);
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setOperationAction(ISD::ADD, MVT::i8, Custom);
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setOperationAction(ISD::ADD, MVT::i16, Custom);
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2008-11-26 10:53:50 +00:00
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setOperationAction(ISD::OR, MVT::i8, Custom);
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setOperationAction(ISD::AND, MVT::i8, Custom);
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setOperationAction(ISD::XOR, MVT::i8, Custom);
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2009-01-13 19:18:47 +00:00
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setOperationAction(ISD::FrameIndex, MVT::i16, Custom);
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setOperationAction(ISD::CALL, MVT::i16, Custom);
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setOperationAction(ISD::RET, MVT::Other, Custom);
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2009-01-21 05:44:05 +00:00
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setOperationAction(ISD::MUL, MVT::i8, Custom);
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setOperationAction(ISD::MUL, MVT::i16, Expand);
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setOperationAction(ISD::MUL, MVT::i32, Expand);
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setOperationAction(ISD::SMUL_LOHI, MVT::i8, Expand);
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setOperationAction(ISD::SMUL_LOHI, MVT::i16, Expand);
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setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand);
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setOperationAction(ISD::UMUL_LOHI, MVT::i8, Expand);
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setOperationAction(ISD::UMUL_LOHI, MVT::i16, Expand);
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setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand);
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setOperationAction(ISD::MULHU, MVT::i8, Expand);
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setOperationAction(ISD::MULHU, MVT::i16, Expand);
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setOperationAction(ISD::MULHU, MVT::i32, Expand);
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setOperationAction(ISD::MULHS, MVT::i8, Expand);
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setOperationAction(ISD::MULHS, MVT::i16, Expand);
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setOperationAction(ISD::MULHS, MVT::i32, Expand);
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setOperationAction(ISD::SRA, MVT::i8, Custom);
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setOperationAction(ISD::SRA, MVT::i16, Expand);
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setOperationAction(ISD::SRA, MVT::i32, Expand);
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setOperationAction(ISD::SHL, MVT::i8, Custom);
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setOperationAction(ISD::SHL, MVT::i16, Expand);
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setOperationAction(ISD::SHL, MVT::i32, Expand);
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setOperationAction(ISD::SRL, MVT::i8, Custom);
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setOperationAction(ISD::SRL, MVT::i16, Expand);
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setOperationAction(ISD::SRL, MVT::i32, Expand);
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// PIC16 does not support shift parts
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setOperationAction(ISD::SRA_PARTS, MVT::i8, Expand);
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setOperationAction(ISD::SRA_PARTS, MVT::i16, Expand);
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setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand);
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setOperationAction(ISD::SHL_PARTS, MVT::i8, Expand);
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setOperationAction(ISD::SHL_PARTS, MVT::i16, Expand);
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setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand);
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setOperationAction(ISD::SRL_PARTS, MVT::i8, Expand);
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setOperationAction(ISD::SRL_PARTS, MVT::i16, Expand);
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setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand);
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2009-01-13 19:18:47 +00:00
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// PIC16 does not have a SETCC, expand it to SELECT_CC.
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setOperationAction(ISD::SETCC, MVT::i8, Expand);
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setOperationAction(ISD::SELECT, MVT::i8, Expand);
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setOperationAction(ISD::BRCOND, MVT::Other, Expand);
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setOperationAction(ISD::BRIND, MVT::Other, Expand);
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setOperationAction(ISD::SELECT_CC, MVT::i8, Custom);
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setOperationAction(ISD::BR_CC, MVT::i8, Custom);
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2008-11-19 11:00:54 +00:00
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//setOperationAction(ISD::TRUNCATE, MVT::i16, Custom);
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setTruncStoreAction(MVT::i16, MVT::i8, Custom);
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// Now deduce the information based on the above mentioned
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// actions
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computeRegisterProperties();
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}
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static void PopulateResults(SDValue N, SmallVectorImpl<SDValue>&Results) {
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if (N.getOpcode() == ISD::MERGE_VALUES) {
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int NumResults = N.getNumOperands();
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for( int i = 0; i < NumResults; i++)
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Results.push_back(N.getOperand(i));
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}
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else
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Results.push_back(N);
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}
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MVT PIC16TargetLowering::getSetCCResultType(MVT ValType) const {
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return MVT::i8;
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}
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void
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PIC16TargetLowering::setPIC16LibcallName(PIC16ISD::PIC16Libcall Call,
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const char *Name) {
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PIC16LibcallNames[Call] = Name;
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}
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const char *
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PIC16TargetLowering::getPIC16LibcallName(PIC16ISD::PIC16Libcall Call) {
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return PIC16LibcallNames[Call];
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}
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SDValue
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PIC16TargetLowering::MakePIC16Libcall(PIC16ISD::PIC16Libcall Call,
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MVT RetVT, const SDValue *Ops,
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unsigned NumOps, bool isSigned,
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SelectionDAG &DAG) {
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TargetLowering::ArgListTy Args;
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Args.reserve(NumOps);
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TargetLowering::ArgListEntry Entry;
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for (unsigned i = 0; i != NumOps; ++i) {
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Entry.Node = Ops[i];
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Entry.Ty = Entry.Node.getValueType().getTypeForMVT();
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Entry.isSExt = isSigned;
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Entry.isZExt = !isSigned;
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Args.push_back(Entry);
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}
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SDValue Callee = DAG.getExternalSymbol(getPIC16LibcallName(Call), MVT::i8);
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const Type *RetTy = RetVT.getTypeForMVT();
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std::pair<SDValue,SDValue> CallInfo =
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LowerCallTo(DAG.getEntryNode(), RetTy, isSigned, !isSigned, false,
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false, CallingConv::C, false, Callee, Args, DAG);
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return CallInfo.first;
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}
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SDValue
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PIC16TargetLowering::getCurrentFrame(SelectionDAG &DAG) {
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MachineFunction &MF = DAG.getMachineFunction();
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const Function *Func = MF.getFunction();
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const std::string FuncName = Func->getName();
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// this is causing memory waste
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// because for every call new memory will be allocated
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char *tmpName = new char [strlen(FuncName.c_str()) + 6];
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sprintf(tmpName, "%s.tmp", FuncName.c_str());
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// if the external symbol of the same name already exists then
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// it will not create the new one.
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return DAG.getTargetExternalSymbol(tmpName, MVT::i8);
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}
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void
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PIC16TargetLowering::getCurrentFrameIndex(SelectionDAG &DAG, SDValue &ES,
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unsigned SlotSize, int &FromFI) {
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MachineFunction &MF = DAG.getMachineFunction();
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const Function *Func = MF.getFunction();
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const std::string FuncName = Func->getName();
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// this is causing memory waste
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// because for every call new memory will be allocated
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char *tmpName = new char [strlen(FuncName.c_str()) + 6];
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sprintf(tmpName, "%s.tmp", FuncName.c_str());
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// if the external symbol of the same name already exists then
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// it will not create the new one.
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ES = DAG.getTargetExternalSymbol(tmpName, MVT::i8);
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// Alignment is always 1
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//FromFI = MF.getFrameInfo()->CreateStackObject(SlotSize, 1);
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FromFI = MF.getFrameInfo()->CreateStackObject(1, 1);
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int FI;
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for(unsigned i=1;i<SlotSize; ++i) {
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FI = MF.getFrameInfo()->CreateStackObject(1, 1);
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}
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}
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2008-11-19 11:00:54 +00:00
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const char *PIC16TargetLowering::getTargetNodeName(unsigned Opcode) const {
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switch (Opcode) {
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default: return NULL;
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case PIC16ISD::Lo: return "PIC16ISD::Lo";
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case PIC16ISD::Hi: return "PIC16ISD::Hi";
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case PIC16ISD::MTLO: return "PIC16ISD::MTLO";
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case PIC16ISD::MTHI: return "PIC16ISD::MTHI";
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case PIC16ISD::Banksel: return "PIC16ISD::Banksel";
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case PIC16ISD::PIC16Load: return "PIC16ISD::PIC16Load";
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case PIC16ISD::PIC16LdWF: return "PIC16ISD::PIC16LdWF";
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case PIC16ISD::PIC16Store: return "PIC16ISD::PIC16Store";
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case PIC16ISD::PIC16StWF: return "PIC16ISD::PIC16StWF";
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case PIC16ISD::BCF: return "PIC16ISD::BCF";
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case PIC16ISD::LSLF: return "PIC16ISD::LSLF";
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case PIC16ISD::LRLF: return "PIC16ISD::LRLF";
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case PIC16ISD::RLF: return "PIC16ISD::RLF";
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case PIC16ISD::RRF: return "PIC16ISD::RRF";
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case PIC16ISD::CALL: return "PIC16ISD::CALL";
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case PIC16ISD::SUBCC: return "PIC16ISD::SUBCC";
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case PIC16ISD::SELECT_ICC: return "PIC16ISD::SELECT_ICC";
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case PIC16ISD::BRCOND: return "PIC16ISD::BRCOND";
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2008-11-19 11:00:54 +00:00
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case PIC16ISD::Dummy: return "PIC16ISD::Dummy";
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}
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}
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2008-05-13 09:02:57 +00:00
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2008-12-01 11:39:25 +00:00
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void PIC16TargetLowering::ReplaceNodeResults(SDNode *N,
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SmallVectorImpl<SDValue>&Results,
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SelectionDAG &DAG) {
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switch (N->getOpcode()) {
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case ISD::GlobalAddress:
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Results.push_back(ExpandGlobalAddress(N, DAG));
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return;
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case ISD::ExternalSymbol:
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Results.push_back(ExpandExternalSymbol(N, DAG));
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return;
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case ISD::STORE:
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Results.push_back(ExpandStore(N, DAG));
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return;
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case ISD::LOAD:
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PopulateResults(ExpandLoad(N, DAG), Results);
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2008-12-01 11:39:25 +00:00
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return;
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2008-11-19 11:00:54 +00:00
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case ISD::ADD:
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2009-01-13 19:18:47 +00:00
|
|
|
// Results.push_back(ExpandAdd(N, DAG));
|
2008-12-01 11:39:25 +00:00
|
|
|
return;
|
2009-01-13 19:18:47 +00:00
|
|
|
case ISD::FrameIndex:
|
|
|
|
Results.push_back(ExpandFrameIndex(N, DAG));
|
|
|
|
return;
|
2008-11-19 11:00:54 +00:00
|
|
|
default:
|
|
|
|
assert (0 && "not implemented");
|
2008-12-01 11:39:25 +00:00
|
|
|
return;
|
2008-11-19 11:00:54 +00:00
|
|
|
}
|
|
|
|
}
|
2008-05-14 11:31:39 +00:00
|
|
|
|
2009-01-13 19:18:47 +00:00
|
|
|
SDValue PIC16TargetLowering::ExpandFrameIndex(SDNode *N, SelectionDAG &DAG) {
|
|
|
|
|
|
|
|
// Currently handling FrameIndex of size MVT::i16 only
|
|
|
|
// One example of this scenario is when return value is written on
|
|
|
|
// FrameIndex#0
|
|
|
|
|
|
|
|
if (N->getValueType(0) != MVT::i16)
|
|
|
|
return SDValue();
|
|
|
|
|
|
|
|
// Expand the FrameIndex into ExternalSymbol and a Constant node
|
|
|
|
// The constant will represent the frame index number
|
|
|
|
// Get the current function frame
|
|
|
|
MachineFunction &MF = DAG.getMachineFunction();
|
|
|
|
const Function *Func = MF.getFunction();
|
|
|
|
const std::string Name = Func->getName();
|
|
|
|
|
|
|
|
FrameIndexSDNode *FR = dyn_cast<FrameIndexSDNode>(SDValue(N,0));
|
|
|
|
int Index = FR->getIndex();
|
|
|
|
|
|
|
|
SDValue FI[2];
|
|
|
|
FI[0] = DAG.getTargetFrameIndex(Index, MVT::i8);
|
|
|
|
FI[1] = DAG.getTargetFrameIndex(Index + 1, MVT::i8);
|
|
|
|
return DAG.getNode(ISD::BUILD_PAIR, N->getValueType(0), FI[0], FI[1]);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
SDValue PIC16TargetLowering::ExpandStore(SDNode *N, SelectionDAG &DAG) {
|
2008-11-19 11:00:54 +00:00
|
|
|
StoreSDNode *St = cast<StoreSDNode>(N);
|
|
|
|
SDValue Chain = St->getChain();
|
|
|
|
SDValue Src = St->getValue();
|
|
|
|
SDValue Ptr = St->getBasePtr();
|
|
|
|
MVT ValueType = Src.getValueType();
|
|
|
|
unsigned StoreOffset = 0;
|
|
|
|
|
|
|
|
SDValue PtrLo, PtrHi;
|
|
|
|
LegalizeAddress(Ptr, DAG, PtrLo, PtrHi, StoreOffset);
|
|
|
|
|
|
|
|
if (ValueType == MVT::i8) {
|
2008-12-01 11:39:25 +00:00
|
|
|
return DAG.getNode (PIC16ISD::PIC16Store, MVT::Other, Chain, Src,
|
2009-01-13 19:18:47 +00:00
|
|
|
PtrLo, PtrHi,
|
|
|
|
DAG.getConstant (0 + StoreOffset, MVT::i8));
|
2008-11-19 11:00:54 +00:00
|
|
|
}
|
|
|
|
else if (ValueType == MVT::i16) {
|
|
|
|
// Get the Lo and Hi parts from MERGE_VALUE or BUILD_PAIR.
|
|
|
|
SDValue SrcLo, SrcHi;
|
|
|
|
GetExpandedParts(Src, DAG, SrcLo, SrcHi);
|
|
|
|
SDValue ChainLo = Chain, ChainHi = Chain;
|
|
|
|
if (Chain.getOpcode() == ISD::TokenFactor) {
|
|
|
|
ChainLo = Chain.getOperand(0);
|
|
|
|
ChainHi = Chain.getOperand(1);
|
|
|
|
}
|
|
|
|
SDValue Store1 = DAG.getNode(PIC16ISD::PIC16Store, MVT::Other,
|
|
|
|
ChainLo,
|
|
|
|
SrcLo, PtrLo, PtrHi,
|
|
|
|
DAG.getConstant (0 + StoreOffset, MVT::i8));
|
|
|
|
|
|
|
|
SDValue Store2 = DAG.getNode(PIC16ISD::PIC16Store, MVT::Other, ChainHi,
|
|
|
|
SrcHi, PtrLo, PtrHi,
|
|
|
|
DAG.getConstant (1 + StoreOffset, MVT::i8));
|
2008-05-14 11:31:39 +00:00
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
return DAG.getNode(ISD::TokenFactor, MVT::Other, getChain(Store1),
|
2008-12-01 11:39:25 +00:00
|
|
|
getChain(Store2));
|
2008-11-19 11:00:54 +00:00
|
|
|
}
|
|
|
|
else if (ValueType == MVT::i32) {
|
|
|
|
// Get the Lo and Hi parts from MERGE_VALUE or BUILD_PAIR.
|
|
|
|
SDValue SrcLo, SrcHi;
|
|
|
|
GetExpandedParts(Src, DAG, SrcLo, SrcHi);
|
|
|
|
|
|
|
|
// Get the expanded parts of each of SrcLo and SrcHi.
|
|
|
|
SDValue SrcLo1, SrcLo2, SrcHi1, SrcHi2;
|
|
|
|
GetExpandedParts(SrcLo, DAG, SrcLo1, SrcLo2);
|
|
|
|
GetExpandedParts(SrcHi, DAG, SrcHi1, SrcHi2);
|
|
|
|
|
|
|
|
SDValue ChainLo = Chain, ChainHi = Chain;
|
|
|
|
if (Chain.getOpcode() == ISD::TokenFactor) {
|
|
|
|
ChainLo = Chain.getOperand(0);
|
|
|
|
ChainHi = Chain.getOperand(1);
|
|
|
|
}
|
|
|
|
SDValue ChainLo1 = ChainLo, ChainLo2 = ChainLo, ChainHi1 = ChainHi,
|
|
|
|
ChainHi2 = ChainHi;
|
|
|
|
if (ChainLo.getOpcode() == ISD::TokenFactor) {
|
|
|
|
ChainLo1 = ChainLo.getOperand(0);
|
|
|
|
ChainLo2 = ChainLo.getOperand(1);
|
|
|
|
}
|
|
|
|
if (ChainHi.getOpcode() == ISD::TokenFactor) {
|
|
|
|
ChainHi1 = ChainHi.getOperand(0);
|
|
|
|
ChainHi2 = ChainHi.getOperand(1);
|
|
|
|
}
|
|
|
|
SDValue Store1 = DAG.getNode(PIC16ISD::PIC16Store, MVT::Other,
|
|
|
|
ChainLo1,
|
|
|
|
SrcLo1, PtrLo, PtrHi,
|
|
|
|
DAG.getConstant (0 + StoreOffset, MVT::i8));
|
2008-05-14 11:31:39 +00:00
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
SDValue Store2 = DAG.getNode(PIC16ISD::PIC16Store, MVT::Other, ChainLo2,
|
|
|
|
SrcLo2, PtrLo, PtrHi,
|
|
|
|
DAG.getConstant (1 + StoreOffset, MVT::i8));
|
2008-05-14 11:31:39 +00:00
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
SDValue Store3 = DAG.getNode(PIC16ISD::PIC16Store, MVT::Other, ChainHi1,
|
|
|
|
SrcHi1, PtrLo, PtrHi,
|
|
|
|
DAG.getConstant (2 + StoreOffset, MVT::i8));
|
2008-05-14 11:31:39 +00:00
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
SDValue Store4 = DAG.getNode(PIC16ISD::PIC16Store, MVT::Other, ChainHi2,
|
|
|
|
SrcHi2, PtrLo, PtrHi,
|
|
|
|
DAG.getConstant (3 + StoreOffset, MVT::i8));
|
2008-05-14 11:31:39 +00:00
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
SDValue RetLo = DAG.getNode(ISD::TokenFactor, MVT::Other, getChain(Store1),
|
|
|
|
getChain(Store2));
|
|
|
|
SDValue RetHi = DAG.getNode(ISD::TokenFactor, MVT::Other, getChain(Store3),
|
|
|
|
getChain(Store4));
|
2009-01-13 19:18:47 +00:00
|
|
|
return DAG.getNode(ISD::TokenFactor, MVT::Other, RetLo, RetHi);
|
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
}
|
|
|
|
else {
|
|
|
|
assert (0 && "value type not supported");
|
2008-12-01 11:39:25 +00:00
|
|
|
return SDValue();
|
2008-11-19 11:00:54 +00:00
|
|
|
}
|
2008-05-13 09:02:57 +00:00
|
|
|
}
|
|
|
|
|
2009-01-13 19:18:47 +00:00
|
|
|
SDValue PIC16TargetLowering::ExpandExternalSymbol(SDNode *N, SelectionDAG &DAG)
|
|
|
|
{
|
|
|
|
ExternalSymbolSDNode *ES = dyn_cast<ExternalSymbolSDNode>(SDValue(N, 0));
|
|
|
|
|
|
|
|
SDValue TES = DAG.getTargetExternalSymbol(ES->getSymbol(), MVT::i8);
|
|
|
|
|
|
|
|
SDValue Lo = DAG.getNode(PIC16ISD::Lo, MVT::i8, TES);
|
|
|
|
SDValue Hi = DAG.getNode(PIC16ISD::Hi, MVT::i8, TES);
|
|
|
|
|
|
|
|
return DAG.getNode(ISD::BUILD_PAIR, MVT::i16, Lo, Hi);
|
|
|
|
}
|
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
// ExpandGlobalAddress -
|
2008-12-01 11:39:25 +00:00
|
|
|
SDValue PIC16TargetLowering::ExpandGlobalAddress(SDNode *N, SelectionDAG &DAG) {
|
2008-11-19 11:00:54 +00:00
|
|
|
GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(SDValue(N, 0));
|
|
|
|
|
|
|
|
SDValue TGA = DAG.getTargetGlobalAddress(G->getGlobal(), MVT::i8,
|
|
|
|
G->getOffset());
|
|
|
|
|
|
|
|
SDValue Lo = DAG.getNode(PIC16ISD::Lo, MVT::i8, TGA);
|
|
|
|
SDValue Hi = DAG.getNode(PIC16ISD::Hi, MVT::i8, TGA);
|
2008-05-13 09:02:57 +00:00
|
|
|
|
2009-01-13 19:18:47 +00:00
|
|
|
return DAG.getNode(ISD::BUILD_PAIR, MVT::i16, Lo, Hi);
|
2008-11-19 11:00:54 +00:00
|
|
|
}
|
2008-05-13 09:02:57 +00:00
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
bool PIC16TargetLowering::isDirectAddress(const SDValue &Op) {
|
|
|
|
assert (Op.getNode() != NULL && "Can't operate on NULL SDNode!!");
|
|
|
|
|
|
|
|
if (Op.getOpcode() == ISD::BUILD_PAIR) {
|
|
|
|
if (Op.getOperand(0).getOpcode() == PIC16ISD::Lo)
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
return false;
|
2008-05-13 09:02:57 +00:00
|
|
|
}
|
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
// Return true if DirectAddress is in ROM_SPACE
|
|
|
|
bool PIC16TargetLowering::isRomAddress(const SDValue &Op) {
|
2008-05-13 09:02:57 +00:00
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
// RomAddress is a GlobalAddress in ROM_SPACE_
|
|
|
|
// If the Op is not a GlobalAddress return NULL without checking
|
|
|
|
// anything further.
|
|
|
|
if (!isDirectAddress(Op))
|
|
|
|
return false;
|
|
|
|
|
|
|
|
// Its a GlobalAddress.
|
|
|
|
// It is BUILD_PAIR((PIC16Lo TGA), (PIC16Hi TGA)) and Op is BUILD_PAIR
|
|
|
|
SDValue TGA = Op.getOperand(0).getOperand(0);
|
|
|
|
GlobalAddressSDNode *GSDN = dyn_cast<GlobalAddressSDNode>(TGA);
|
|
|
|
const Type *ValueType = GSDN->getGlobal()->getType();
|
2008-05-14 11:31:39 +00:00
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
if (!isa<PointerType>(ValueType)) {
|
|
|
|
assert(0 && "TGA must be of a PointerType");
|
|
|
|
}
|
|
|
|
|
|
|
|
int AddrSpace = dyn_cast<PointerType>(ValueType)->getAddressSpace();
|
|
|
|
if (AddrSpace == PIC16ISD::ROM_SPACE)
|
|
|
|
return true;
|
|
|
|
|
|
|
|
// Any other address space return it false
|
|
|
|
return false;
|
2008-05-13 09:02:57 +00:00
|
|
|
}
|
|
|
|
|
2009-01-13 19:18:47 +00:00
|
|
|
// Extract the out flag
|
|
|
|
SDValue PIC16TargetLowering::getOutFlag(SDValue &Op) {
|
|
|
|
SDValue Flag = Op.getValue(Op.getNode()->getNumValues() - 1);
|
|
|
|
|
|
|
|
assert (Flag.getValueType() == MVT::Flag && "Node does not have an out Flag");
|
|
|
|
|
|
|
|
return Flag;
|
|
|
|
}
|
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
// To extract chain value from the SDValue Nodes
|
|
|
|
// This function will help to maintain the chain extracting
|
|
|
|
// code at one place. In case of any change in future it will
|
|
|
|
// help maintain the code.
|
|
|
|
SDValue PIC16TargetLowering::getChain(SDValue &Op) {
|
|
|
|
SDValue Chain = Op.getValue(Op.getNode()->getNumValues() - 1);
|
2008-05-14 11:31:39 +00:00
|
|
|
|
2009-01-13 19:18:47 +00:00
|
|
|
// If the last value returned in Flag then the chain is
|
|
|
|
// second last value returned.
|
|
|
|
if (Chain.getValueType() == MVT::Flag)
|
|
|
|
Chain = Op.getValue(Op.getNode()->getNumValues() - 2);
|
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
// All nodes may not produce a chain. Therefore following assert
|
|
|
|
// verifies that the node is returning a chain only.
|
|
|
|
assert (Chain.getValueType() == MVT::Other && "Node does not have a chain");
|
|
|
|
|
|
|
|
return Chain;
|
2008-05-13 09:02:57 +00:00
|
|
|
}
|
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
void PIC16TargetLowering::GetExpandedParts(SDValue Op, SelectionDAG &DAG,
|
2009-01-13 19:18:47 +00:00
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
SDValue &Lo, SDValue &Hi) {
|
|
|
|
SDNode *N = Op.getNode();
|
|
|
|
MVT NewVT;
|
|
|
|
std::vector<SDValue> Opers;
|
2009-01-13 19:18:47 +00:00
|
|
|
NewVT = getTypeToTransformTo(N->getValueType(0));
|
2008-05-13 09:02:57 +00:00
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
// extract the lo component
|
|
|
|
Opers.push_back(Op);
|
|
|
|
Opers.push_back(DAG.getConstant(0,MVT::i8));
|
2009-01-13 19:18:47 +00:00
|
|
|
Lo = DAG.getNode(ISD::EXTRACT_ELEMENT,NewVT,&Opers[0],Opers.size());
|
2008-11-19 11:00:54 +00:00
|
|
|
// extract the hi component
|
|
|
|
Opers.clear();
|
|
|
|
Opers.push_back(Op);
|
|
|
|
Opers.push_back(DAG.getConstant(1,MVT::i8));
|
2009-01-13 19:18:47 +00:00
|
|
|
Hi = DAG.getNode(ISD::EXTRACT_ELEMENT,NewVT,&Opers[0],Opers.size());
|
|
|
|
}
|
|
|
|
|
|
|
|
// Legalize FrameIndex into ExternalSymbol and offset.
|
|
|
|
void
|
|
|
|
PIC16TargetLowering::LegalizeFrameIndex(SDValue Op, SelectionDAG &DAG,
|
|
|
|
SDValue &ES, int &Offset) {
|
|
|
|
|
|
|
|
MachineFunction &MF = DAG.getMachineFunction();
|
|
|
|
const Function *Func = MF.getFunction();
|
|
|
|
const std::string Name = Func->getName();
|
|
|
|
|
|
|
|
char *tmpName = new char [strlen(Name.c_str()) + 8];
|
|
|
|
sprintf(tmpName, "%s.args", Name.c_str());
|
|
|
|
ES = DAG.getTargetExternalSymbol(tmpName, MVT::i8);
|
|
|
|
FrameIndexSDNode *FR = dyn_cast<FrameIndexSDNode>(Op);
|
|
|
|
Offset = FR->getIndex();
|
|
|
|
|
|
|
|
return;
|
2008-05-13 09:02:57 +00:00
|
|
|
}
|
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
// This function legalizes the PIC16 Addresses. If the Pointer is
|
|
|
|
// -- Direct address variable residing
|
|
|
|
// --> then a Banksel for that variable will be created.
|
|
|
|
// -- Rom variable
|
|
|
|
// --> then it will be treated as an indirect address.
|
|
|
|
// -- Indirect address
|
|
|
|
// --> then the address will be loaded into FSR
|
|
|
|
// -- ADD with constant operand
|
|
|
|
// --> then constant operand of ADD will be returned as Offset
|
|
|
|
// and non-constant operand of ADD will be treated as pointer.
|
|
|
|
// Returns the high and lo part of the address, and the offset(in case of ADD).
|
|
|
|
|
|
|
|
void PIC16TargetLowering:: LegalizeAddress(SDValue Ptr, SelectionDAG &DAG,
|
|
|
|
SDValue &Lo, SDValue &Hi,
|
|
|
|
unsigned &Offset) {
|
|
|
|
|
|
|
|
// Offset, by default, should be 0
|
|
|
|
Offset = 0;
|
|
|
|
|
|
|
|
// If the pointer is ADD with constant,
|
|
|
|
// return the constant value as the offset
|
|
|
|
if (Ptr.getOpcode() == ISD::ADD) {
|
|
|
|
SDValue OperLeft = Ptr.getOperand(0);
|
|
|
|
SDValue OperRight = Ptr.getOperand(1);
|
|
|
|
if (OperLeft.getOpcode() == ISD::Constant) {
|
|
|
|
Offset = dyn_cast<ConstantSDNode>(OperLeft)->getZExtValue();
|
|
|
|
Ptr = OperRight;
|
2009-01-13 19:18:47 +00:00
|
|
|
} else if (OperRight.getOpcode() == ISD::Constant) {
|
2008-11-19 11:00:54 +00:00
|
|
|
Offset = dyn_cast<ConstantSDNode>(OperRight)->getZExtValue();
|
2009-01-13 19:18:47 +00:00
|
|
|
Ptr = OperLeft;
|
2008-05-13 09:02:57 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2009-01-13 19:18:47 +00:00
|
|
|
// If the pointer is Type i8 and an external symbol
|
|
|
|
// then treat it as direct address.
|
|
|
|
// One example for such case is storing and loading
|
|
|
|
// from function frame during a call
|
|
|
|
if (Ptr.getValueType() == MVT::i8) {
|
|
|
|
switch (Ptr.getOpcode()) {
|
|
|
|
case ISD::TargetExternalSymbol:
|
|
|
|
Lo = Ptr;
|
|
|
|
Hi = DAG.getConstant(1, MVT::i8);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (Ptr.getOpcode() == ISD::BUILD_PAIR &&
|
|
|
|
Ptr.getOperand(0).getOpcode() == ISD::TargetFrameIndex) {
|
|
|
|
|
|
|
|
int FrameOffset;
|
|
|
|
LegalizeFrameIndex(Ptr.getOperand(0), DAG, Lo, FrameOffset);
|
|
|
|
Hi = DAG.getConstant(1, MVT::i8);
|
|
|
|
Offset += FrameOffset;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
if (isDirectAddress(Ptr) && !isRomAddress(Ptr)) {
|
|
|
|
// Direct addressing case for RAM variables. The Hi part is constant
|
|
|
|
// and the Lo part is the TGA itself.
|
|
|
|
Lo = Ptr.getOperand(0).getOperand(0);
|
|
|
|
|
|
|
|
// For direct addresses Hi is a constant. Value 1 for the constant
|
|
|
|
// signifies that banksel needs to generated for it. Value 0 for
|
|
|
|
// the constant signifies that banksel does not need to be generated
|
|
|
|
// for it. Mark it as 1 now and optimize later.
|
|
|
|
Hi = DAG.getConstant(1, MVT::i8);
|
|
|
|
return;
|
|
|
|
}
|
2008-05-13 09:02:57 +00:00
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
// Indirect addresses. Get the hi and lo parts of ptr.
|
|
|
|
GetExpandedParts(Ptr, DAG, Lo, Hi);
|
2008-05-13 09:02:57 +00:00
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
// Put the hi and lo parts into FSR.
|
|
|
|
Lo = DAG.getNode(PIC16ISD::MTLO, MVT::i8, Lo);
|
|
|
|
Hi = DAG.getNode(PIC16ISD::MTHI, MVT::i8, Hi);
|
2008-05-13 09:02:57 +00:00
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
return;
|
2008-05-13 09:02:57 +00:00
|
|
|
}
|
|
|
|
|
2009-01-13 19:18:47 +00:00
|
|
|
//SDValue PIC16TargetLowering::ExpandAdd(SDNode *N, SelectionDAG &DAG) {
|
|
|
|
//SDValue OperLeft = N->getOperand(0);
|
|
|
|
//SDValue OperRight = N->getOperand(1);
|
|
|
|
|
|
|
|
//if((OperLeft.getOpcode() == ISD::Constant) ||
|
|
|
|
//(OperRight.getOpcode() == ISD::Constant)) {
|
|
|
|
//return SDValue();
|
|
|
|
//}
|
|
|
|
|
|
|
|
// These case are yet to be handled
|
|
|
|
//return SDValue();
|
2008-12-01 11:39:25 +00:00
|
|
|
//}
|
2008-05-14 11:31:39 +00:00
|
|
|
|
2008-12-01 11:39:25 +00:00
|
|
|
SDValue PIC16TargetLowering::ExpandLoad(SDNode *N, SelectionDAG &DAG) {
|
2008-11-19 11:00:54 +00:00
|
|
|
LoadSDNode *LD = dyn_cast<LoadSDNode>(SDValue(N, 0));
|
|
|
|
SDValue Chain = LD->getChain();
|
|
|
|
SDValue Ptr = LD->getBasePtr();
|
|
|
|
|
|
|
|
SDValue Load, Offset;
|
|
|
|
SDVTList Tys;
|
|
|
|
MVT VT, NewVT;
|
|
|
|
SDValue PtrLo, PtrHi;
|
|
|
|
unsigned LoadOffset;
|
|
|
|
|
|
|
|
// Legalize direct/indirect addresses. This will give the lo and hi parts
|
|
|
|
// of the address and the offset.
|
|
|
|
LegalizeAddress(Ptr, DAG, PtrLo, PtrHi, LoadOffset);
|
|
|
|
|
|
|
|
// Load from the pointer (direct address or FSR)
|
|
|
|
VT = N->getValueType(0);
|
|
|
|
unsigned NumLoads = VT.getSizeInBits() / 8;
|
|
|
|
std::vector<SDValue> PICLoads;
|
|
|
|
unsigned iter;
|
|
|
|
MVT MemVT = LD->getMemoryVT();
|
|
|
|
if(ISD::isNON_EXTLoad(N)) {
|
|
|
|
for (iter=0; iter<NumLoads ; ++iter) {
|
|
|
|
// Add the pointer offset if any
|
|
|
|
Offset = DAG.getConstant(iter + LoadOffset, MVT::i8);
|
|
|
|
Tys = DAG.getVTList(MVT::i8, MVT::Other);
|
|
|
|
Load = DAG.getNode(PIC16ISD::PIC16Load, Tys, Chain, PtrLo, PtrHi,
|
|
|
|
Offset);
|
|
|
|
PICLoads.push_back(Load);
|
2008-05-13 09:02:57 +00:00
|
|
|
}
|
2008-11-19 11:00:54 +00:00
|
|
|
} else {
|
|
|
|
// If it is extended load then use PIC16Load for Memory Bytes
|
|
|
|
// and for all extended bytes perform action based on type of
|
|
|
|
// extention - i.e. SignExtendedLoad or ZeroExtendedLoad
|
|
|
|
|
|
|
|
|
|
|
|
// For extended loads this is the memory value type
|
|
|
|
// i.e. without any extension
|
|
|
|
MVT MemVT = LD->getMemoryVT();
|
|
|
|
unsigned MemBytes = MemVT.getSizeInBits() / 8;
|
|
|
|
unsigned ExtdBytes = VT.getSizeInBits() / 8;
|
|
|
|
Offset = DAG.getConstant(LoadOffset, MVT::i8);
|
|
|
|
|
|
|
|
Tys = DAG.getVTList(MVT::i8, MVT::Other);
|
|
|
|
// For MemBytes generate PIC16Load with proper offset
|
|
|
|
for (iter=0; iter<MemBytes; ++iter) {
|
|
|
|
// Add the pointer offset if any
|
|
|
|
Offset = DAG.getConstant(iter + LoadOffset, MVT::i8);
|
|
|
|
Load = DAG.getNode(PIC16ISD::PIC16Load, Tys, Chain, PtrLo, PtrHi,
|
|
|
|
Offset);
|
|
|
|
PICLoads.push_back(Load);
|
2008-05-13 09:02:57 +00:00
|
|
|
}
|
2008-11-19 11:00:54 +00:00
|
|
|
|
|
|
|
// For SignExtendedLoad
|
|
|
|
if (ISD::isSEXTLoad(N)) {
|
|
|
|
// For all ExtdBytes use the Right Shifted(Arithmetic) Value of the
|
|
|
|
// highest MemByte
|
|
|
|
SDValue SRA = DAG.getNode(ISD::SRA, MVT::i8, Load,
|
|
|
|
DAG.getConstant(7, MVT::i8));
|
|
|
|
for (iter=MemBytes; iter<ExtdBytes; ++iter) {
|
|
|
|
PICLoads.push_back(SRA);
|
|
|
|
}
|
|
|
|
} else if (ISD::isZEXTLoad(N)) {
|
|
|
|
// ZeroExtendedLoad -- For all ExtdBytes use constant 0
|
|
|
|
SDValue ConstZero = DAG.getConstant(0, MVT::i8);
|
|
|
|
for (iter=MemBytes; iter<ExtdBytes; ++iter) {
|
|
|
|
PICLoads.push_back(ConstZero);
|
|
|
|
}
|
2008-05-13 09:02:57 +00:00
|
|
|
}
|
2008-11-19 11:00:54 +00:00
|
|
|
}
|
|
|
|
SDValue BP;
|
|
|
|
|
|
|
|
if (VT == MVT::i8) {
|
|
|
|
// Operand of Load is illegal -- Load itself is legal
|
2008-12-01 11:39:25 +00:00
|
|
|
return PICLoads[0];
|
2008-11-19 11:00:54 +00:00
|
|
|
}
|
|
|
|
else if (VT == MVT::i16) {
|
|
|
|
BP = DAG.getNode(ISD::BUILD_PAIR, VT, PICLoads[0], PICLoads[1]);
|
|
|
|
if (MemVT == MVT::i8)
|
|
|
|
Chain = getChain(PICLoads[0]);
|
|
|
|
else
|
|
|
|
Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, getChain(PICLoads[0]),
|
|
|
|
getChain(PICLoads[1]));
|
|
|
|
} else if (VT == MVT::i32) {
|
|
|
|
SDValue BPs[2];
|
|
|
|
BPs[0] = DAG.getNode(ISD::BUILD_PAIR, MVT::i16, PICLoads[0], PICLoads[1]);
|
|
|
|
BPs[1] = DAG.getNode(ISD::BUILD_PAIR, MVT::i16, PICLoads[2], PICLoads[3]);
|
|
|
|
BP = DAG.getNode(ISD::BUILD_PAIR, VT, BPs[0], BPs[1]);
|
|
|
|
if (MemVT == MVT::i8)
|
|
|
|
Chain = getChain(PICLoads[0]);
|
|
|
|
else if (MemVT == MVT::i16)
|
|
|
|
Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, getChain(PICLoads[0]),
|
|
|
|
getChain(PICLoads[1]));
|
2008-05-13 09:02:57 +00:00
|
|
|
else {
|
2008-11-19 11:00:54 +00:00
|
|
|
SDValue Chains[2];
|
|
|
|
Chains[0] = DAG.getNode(ISD::TokenFactor, MVT::Other,
|
|
|
|
getChain(PICLoads[0]), getChain(PICLoads[1]));
|
|
|
|
Chains[1] = DAG.getNode(ISD::TokenFactor, MVT::Other,
|
|
|
|
getChain(PICLoads[2]), getChain(PICLoads[3]));
|
|
|
|
Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, Chains[0], Chains[1]);
|
2008-05-13 09:02:57 +00:00
|
|
|
}
|
2008-11-19 11:00:54 +00:00
|
|
|
}
|
|
|
|
Tys = DAG.getVTList(VT, MVT::Other);
|
2008-12-01 11:39:25 +00:00
|
|
|
return DAG.getNode(ISD::MERGE_VALUES, Tys, BP, Chain);
|
2008-11-19 11:00:54 +00:00
|
|
|
}
|
2008-05-13 09:02:57 +00:00
|
|
|
|
2009-01-21 05:44:05 +00:00
|
|
|
SDValue PIC16TargetLowering::LowerShift(SDValue Op, SelectionDAG &DAG) {
|
|
|
|
// We should have handled larger operands in type legalizer itself.
|
|
|
|
assert (Op.getValueType() == MVT::i8 && "illegal shift to lower");
|
|
|
|
|
|
|
|
SDNode *N = Op.getNode();
|
2008-11-19 11:00:54 +00:00
|
|
|
SDValue Value = N->getOperand(0);
|
|
|
|
SDValue Amt = N->getOperand(1);
|
2009-01-21 05:44:05 +00:00
|
|
|
PIC16ISD::PIC16Libcall CallCode;
|
|
|
|
switch (N->getOpcode()) {
|
|
|
|
case ISD::SRA:
|
|
|
|
CallCode = PIC16ISD::SRA_I8;
|
|
|
|
break;
|
|
|
|
case ISD::SHL:
|
|
|
|
CallCode = PIC16ISD::SLL_I8;
|
|
|
|
break;
|
|
|
|
case ISD::SRL:
|
|
|
|
CallCode = PIC16ISD::SRL_I8;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
assert ( 0 && "This shift is not implemented yet.");
|
2009-01-13 19:18:47 +00:00
|
|
|
return SDValue();
|
2008-11-19 11:00:54 +00:00
|
|
|
}
|
2009-01-13 19:18:47 +00:00
|
|
|
SmallVector<SDValue, 2> Ops(2);
|
|
|
|
Ops[0] = Value;
|
|
|
|
Ops[1] = Amt;
|
2009-01-21 05:44:05 +00:00
|
|
|
SDValue Call = MakePIC16Libcall(CallCode, N->getValueType(0), &Ops[0], 2, true, DAG);
|
2009-01-13 19:18:47 +00:00
|
|
|
return Call;
|
2008-11-19 11:00:54 +00:00
|
|
|
}
|
|
|
|
|
2009-01-21 09:00:29 +00:00
|
|
|
void
|
|
|
|
PIC16TargetLowering::LowerOperationWrapper(SDNode *N,
|
|
|
|
SmallVectorImpl<SDValue>&Results,
|
|
|
|
SelectionDAG &DAG) {
|
|
|
|
SDValue Op = SDValue(N, 0);
|
2009-01-21 05:44:05 +00:00
|
|
|
SDValue Res;
|
|
|
|
unsigned i;
|
|
|
|
switch (Op.getOpcode()) {
|
|
|
|
case ISD::FORMAL_ARGUMENTS:
|
|
|
|
Res = LowerFORMAL_ARGUMENTS(Op, DAG); break;
|
|
|
|
case ISD::LOAD:
|
|
|
|
Res = ExpandLoad(Op.getNode(), DAG); break;
|
|
|
|
case ISD::CALL:
|
|
|
|
Res = LowerCALL(Op, DAG); break;
|
|
|
|
default: {
|
|
|
|
// All other operations are handled in LowerOperation.
|
|
|
|
Res = LowerOperation(Op, DAG);
|
|
|
|
if (Res.getNode())
|
|
|
|
Results.push_back(Res);
|
|
|
|
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
2009-01-21 09:00:29 +00:00
|
|
|
|
|
|
|
N = Res.getNode();
|
2009-01-21 05:44:05 +00:00
|
|
|
unsigned NumValues = N->getNumValues();
|
2009-01-21 09:00:29 +00:00
|
|
|
for (i = 0; i < NumValues ; i++) {
|
2009-01-21 05:44:05 +00:00
|
|
|
Results.push_back(SDValue(N, i));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
SDValue PIC16TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) {
|
|
|
|
switch (Op.getOpcode()) {
|
|
|
|
case ISD::FORMAL_ARGUMENTS:
|
|
|
|
return LowerFORMAL_ARGUMENTS(Op, DAG);
|
2009-01-13 19:18:47 +00:00
|
|
|
case ISD::ADD:
|
2008-11-19 11:00:54 +00:00
|
|
|
case ISD::ADDC:
|
|
|
|
case ISD::ADDE:
|
2009-01-13 19:18:47 +00:00
|
|
|
return LowerADD(Op, DAG);
|
|
|
|
case ISD::SUB:
|
2008-11-19 11:00:54 +00:00
|
|
|
case ISD::SUBC:
|
2009-01-13 19:18:47 +00:00
|
|
|
case ISD::SUBE:
|
|
|
|
return LowerSUB(Op, DAG);
|
2008-11-19 11:00:54 +00:00
|
|
|
case ISD::LOAD:
|
2008-12-01 11:39:25 +00:00
|
|
|
return ExpandLoad(Op.getNode(), DAG);
|
2008-11-19 11:00:54 +00:00
|
|
|
case ISD::STORE:
|
2008-12-01 11:39:25 +00:00
|
|
|
return ExpandStore(Op.getNode(), DAG);
|
2008-11-19 11:00:54 +00:00
|
|
|
case ISD::SHL:
|
2009-01-13 19:18:47 +00:00
|
|
|
case ISD::SRA:
|
|
|
|
case ISD::SRL:
|
2009-01-21 05:44:05 +00:00
|
|
|
return LowerShift(Op, DAG);
|
2008-11-26 10:53:50 +00:00
|
|
|
case ISD::OR:
|
|
|
|
case ISD::AND:
|
|
|
|
case ISD::XOR:
|
|
|
|
return LowerBinOp(Op, DAG);
|
2009-01-13 19:18:47 +00:00
|
|
|
case ISD::CALL:
|
|
|
|
return LowerCALL(Op, DAG);
|
|
|
|
case ISD::RET:
|
|
|
|
return LowerRET(Op, DAG);
|
|
|
|
case ISD::BR_CC:
|
|
|
|
return LowerBR_CC(Op, DAG);
|
|
|
|
case ISD::SELECT_CC:
|
|
|
|
return LowerSELECT_CC(Op, DAG);
|
2008-11-19 11:00:54 +00:00
|
|
|
}
|
|
|
|
return SDValue();
|
|
|
|
}
|
2008-05-13 09:02:57 +00:00
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
SDValue PIC16TargetLowering::ConvertToMemOperand(SDValue Op,
|
|
|
|
SelectionDAG &DAG) {
|
|
|
|
|
|
|
|
assert (Op.getValueType() == MVT::i8
|
|
|
|
&& "illegal value type to store on stack.");
|
|
|
|
|
|
|
|
MachineFunction &MF = DAG.getMachineFunction();
|
|
|
|
const Function *Func = MF.getFunction();
|
|
|
|
const std::string FuncName = Func->getName();
|
|
|
|
|
|
|
|
char *tmpName = new char [strlen(FuncName.c_str()) + 6];
|
|
|
|
|
|
|
|
// Put the value on stack.
|
|
|
|
// Get a stack slot index and convert to es.
|
|
|
|
int FI = MF.getFrameInfo()->CreateStackObject(1, 1);
|
|
|
|
sprintf(tmpName, "%s.tmp", FuncName.c_str());
|
|
|
|
SDValue ES = DAG.getTargetExternalSymbol(tmpName, MVT::i8);
|
|
|
|
|
|
|
|
// Store the value to ES.
|
|
|
|
SDValue Store = DAG.getNode (PIC16ISD::PIC16Store, MVT::Other,
|
|
|
|
DAG.getEntryNode(),
|
|
|
|
Op, ES,
|
|
|
|
DAG.getConstant (1, MVT::i8), // Banksel.
|
|
|
|
DAG.getConstant (FI, MVT::i8));
|
|
|
|
|
|
|
|
// Load the value from ES.
|
|
|
|
SDVTList Tys = DAG.getVTList(MVT::i8, MVT::Other);
|
|
|
|
SDValue Load = DAG.getNode(PIC16ISD::PIC16Load, Tys, Store,
|
|
|
|
ES, DAG.getConstant (1, MVT::i8),
|
|
|
|
DAG.getConstant (FI, MVT::i8));
|
|
|
|
|
|
|
|
return Load.getValue(0);
|
|
|
|
}
|
2009-01-13 19:18:47 +00:00
|
|
|
|
|
|
|
SDValue
|
|
|
|
PIC16TargetLowering::LowerCallArguments(SDValue Op, SDValue Chain,
|
|
|
|
SDValue FrameAddress,
|
|
|
|
SDValue InFlag,
|
|
|
|
SelectionDAG &DAG) {
|
|
|
|
CallSDNode *TheCall = dyn_cast<CallSDNode>(Op);
|
|
|
|
unsigned NumOps = TheCall->getNumArgs();
|
|
|
|
std::string Name;
|
|
|
|
SDValue Arg, StoreAt;
|
|
|
|
MVT ArgVT;
|
|
|
|
unsigned Size=0;
|
|
|
|
unsigned ArgCount=0;
|
|
|
|
|
|
|
|
|
|
|
|
// FIXME: This portion of code currently assumes only
|
|
|
|
// primitive types being passed as arguments.
|
|
|
|
|
|
|
|
// Legalize the address before use
|
|
|
|
SDValue PtrLo, PtrHi;
|
|
|
|
unsigned AddressOffset;
|
|
|
|
int StoreOffset = 0;
|
|
|
|
LegalizeAddress(FrameAddress, DAG, PtrLo, PtrHi, AddressOffset);
|
|
|
|
SDValue StoreRet;
|
|
|
|
|
|
|
|
std::vector<SDValue> Ops;
|
|
|
|
SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag);
|
|
|
|
for (unsigned i=ArgCount, Offset = 0; i<NumOps; i++) {
|
|
|
|
// Get the argument
|
|
|
|
Arg = TheCall->getArg(i);
|
|
|
|
|
|
|
|
StoreOffset = (Offset + AddressOffset);
|
|
|
|
|
|
|
|
// Store the argument on frame
|
|
|
|
|
|
|
|
Ops.clear();
|
|
|
|
Ops.push_back(Chain);
|
|
|
|
Ops.push_back(Arg.getValue(0));
|
|
|
|
Ops.push_back(PtrLo);
|
|
|
|
Ops.push_back(PtrHi);
|
|
|
|
Ops.push_back(DAG.getConstant(StoreOffset, MVT::i8));
|
|
|
|
Ops.push_back(InFlag);
|
|
|
|
|
|
|
|
StoreRet = DAG.getNode (PIC16ISD::PIC16StWF, Tys, &Ops[0], Ops.size());
|
|
|
|
|
|
|
|
Chain = getChain(StoreRet);
|
|
|
|
InFlag = getOutFlag(StoreRet);
|
|
|
|
|
|
|
|
// Update the frame offset to be used for next argument
|
|
|
|
ArgVT = Arg.getValueType();
|
|
|
|
Size = ArgVT.getSizeInBits();
|
|
|
|
Size = Size/8; // Calculate size in bytes
|
|
|
|
Offset += Size; // Increase the frame offset
|
|
|
|
}
|
|
|
|
return Chain;
|
|
|
|
}
|
2008-05-13 09:02:57 +00:00
|
|
|
|
2009-01-13 19:18:47 +00:00
|
|
|
SDValue
|
|
|
|
PIC16TargetLowering::LowerCallReturn(SDValue Op, SDValue Chain,
|
|
|
|
SDValue FrameAddress,
|
|
|
|
SDValue InFlag,
|
|
|
|
SelectionDAG &DAG) {
|
|
|
|
CallSDNode *TheCall = dyn_cast<CallSDNode>(Op);
|
|
|
|
// Currently handling primitive types only. They will come in
|
|
|
|
// i8 parts
|
|
|
|
unsigned RetVals = TheCall->getNumRetVals();
|
|
|
|
|
|
|
|
std::vector<SDValue> ResultVals;
|
2008-11-26 10:53:50 +00:00
|
|
|
|
2009-01-13 19:18:47 +00:00
|
|
|
// Return immediately if the return type is void
|
|
|
|
if (RetVals == 0)
|
|
|
|
return Chain;
|
2008-11-26 10:53:50 +00:00
|
|
|
|
2009-01-13 19:18:47 +00:00
|
|
|
// Call has something to return
|
|
|
|
|
|
|
|
// Legalize the address before use
|
|
|
|
SDValue LdLo, LdHi;
|
|
|
|
unsigned LdOffset;
|
|
|
|
LegalizeAddress(FrameAddress, DAG, LdLo, LdHi, LdOffset);
|
2008-11-26 10:53:50 +00:00
|
|
|
|
2009-01-13 19:18:47 +00:00
|
|
|
SDVTList Tys = DAG.getVTList(MVT::i8, MVT::Other, MVT::Flag);
|
|
|
|
SDValue LoadRet;
|
|
|
|
|
|
|
|
for(unsigned i=0, Offset=0;i<RetVals;i++) {
|
2008-11-26 10:53:50 +00:00
|
|
|
|
2009-01-13 19:18:47 +00:00
|
|
|
LoadRet = DAG.getNode(PIC16ISD::PIC16LdWF, Tys, Chain, LdLo, LdHi,
|
|
|
|
DAG.getConstant(LdOffset + Offset, MVT::i8),
|
|
|
|
InFlag);
|
2008-05-13 09:02:57 +00:00
|
|
|
|
2009-01-13 19:18:47 +00:00
|
|
|
InFlag = getOutFlag(LoadRet);
|
2008-05-13 09:02:57 +00:00
|
|
|
|
2009-01-13 19:18:47 +00:00
|
|
|
Chain = getChain(LoadRet);
|
|
|
|
Offset++;
|
|
|
|
ResultVals.push_back(LoadRet);
|
|
|
|
}
|
|
|
|
|
|
|
|
// To return use MERGE_VALUES
|
|
|
|
ResultVals.push_back(Chain);
|
|
|
|
SDValue Res = DAG.getMergeValues(&ResultVals[0], ResultVals.size());
|
|
|
|
return Res;
|
2008-05-13 09:02:57 +00:00
|
|
|
}
|
|
|
|
|
2009-01-13 19:18:47 +00:00
|
|
|
SDValue PIC16TargetLowering::LowerRET(SDValue Op, SelectionDAG &DAG) {
|
|
|
|
//int NumOps = Op.getNode()->getNumOperands();
|
2008-05-13 09:02:57 +00:00
|
|
|
|
2009-01-13 19:18:47 +00:00
|
|
|
// For default cases LLVM returns the value on the function frame
|
|
|
|
// So let LLVM do this for all the cases other than character
|
|
|
|
return Op;
|
|
|
|
}
|
|
|
|
|
|
|
|
SDValue PIC16TargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) {
|
|
|
|
CallSDNode *TheCall = dyn_cast<CallSDNode>(Op);
|
|
|
|
SDValue Chain = TheCall->getChain();
|
|
|
|
SDValue Callee = TheCall->getCallee();
|
|
|
|
unsigned i =0;
|
|
|
|
if (Callee.getValueType() == MVT::i16 &&
|
|
|
|
Callee.getOpcode() == ISD::BUILD_PAIR) {
|
|
|
|
// It has come from TypeLegalizer for lowering
|
|
|
|
|
|
|
|
Callee = Callee.getOperand(0).getOperand(0);
|
|
|
|
|
|
|
|
std::vector<SDValue> Ops;
|
|
|
|
Ops.push_back(Chain);
|
|
|
|
Ops.push_back(Callee);
|
|
|
|
|
|
|
|
// Add the call arguments and their flags
|
|
|
|
unsigned NumArgs = TheCall->getNumArgs();
|
|
|
|
for(i=0;i<NumArgs;i++) {
|
|
|
|
Ops.push_back(TheCall->getArg(i));
|
|
|
|
Ops.push_back(TheCall->getArgFlagsVal(i));
|
|
|
|
}
|
|
|
|
|
|
|
|
std::vector<MVT> NodeTys;
|
|
|
|
unsigned NumRets = TheCall->getNumRetVals();
|
|
|
|
for(i=0;i<NumRets;i++)
|
|
|
|
NodeTys.push_back(TheCall->getRetValType(i));
|
2008-05-13 09:02:57 +00:00
|
|
|
|
2009-01-13 19:18:47 +00:00
|
|
|
// Return a Chain as well
|
|
|
|
NodeTys.push_back(MVT::Other);
|
|
|
|
|
|
|
|
SDVTList VTs = DAG.getVTList(&NodeTys[0], NodeTys.size());
|
|
|
|
SDValue NewCall =
|
|
|
|
DAG.getCall(TheCall->getCallingConv(), TheCall->isVarArg(),
|
|
|
|
TheCall->isTailCall(), TheCall->isInreg(), VTs,
|
|
|
|
&Ops[0], Ops.size());
|
|
|
|
|
|
|
|
return NewCall;
|
|
|
|
}
|
2008-11-19 11:00:54 +00:00
|
|
|
|
2009-01-13 19:18:47 +00:00
|
|
|
SDValue ZeroOperand = DAG.getConstant(0, MVT::i8);
|
|
|
|
|
|
|
|
// Start the call sequence.
|
|
|
|
// Carring the Constant 0 along the CALLSEQSTART
|
|
|
|
// because there is nothing else to carry.
|
|
|
|
SDValue SeqStart = DAG.getCALLSEQ_START(Chain, ZeroOperand);
|
|
|
|
Chain = getChain(SeqStart);
|
|
|
|
|
|
|
|
// For any direct call - callee will be GlobalAddressNode or
|
|
|
|
// ExternalSymbol
|
|
|
|
|
|
|
|
// Considering the GlobalAddressNode case here.
|
|
|
|
if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) {
|
|
|
|
GlobalValue *GV = G->getGlobal();
|
|
|
|
Callee = DAG.getTargetGlobalAddress(GV, MVT::i8);
|
|
|
|
}
|
|
|
|
|
|
|
|
// Considering the ExternalSymbol case here
|
|
|
|
if (ExternalSymbolSDNode *ES = dyn_cast<ExternalSymbolSDNode>(Callee)) {
|
|
|
|
Callee = DAG.getTargetExternalSymbol(ES->getSymbol(), MVT::i8);
|
|
|
|
}
|
|
|
|
|
|
|
|
SDValue OperFlag = getOutFlag(Chain); // To manage the data dependency
|
|
|
|
|
|
|
|
std::string Name;
|
|
|
|
|
|
|
|
// Considering GlobalAddress here
|
|
|
|
if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee))
|
|
|
|
Name = G->getGlobal()->getName();
|
|
|
|
|
|
|
|
// Considering ExternalSymbol here
|
|
|
|
if (ExternalSymbolSDNode *ES = dyn_cast<ExternalSymbolSDNode>(Callee))
|
|
|
|
Name = ES->getSymbol();
|
|
|
|
|
|
|
|
char *argFrame = new char [strlen(Name.c_str()) + 8];
|
|
|
|
sprintf(argFrame, "%s.args", Name.c_str());
|
|
|
|
SDValue ArgLabel = DAG.getTargetExternalSymbol(argFrame, MVT::i8);
|
|
|
|
|
|
|
|
char *retName = new char [strlen(Name.c_str()) + 8];
|
|
|
|
sprintf(retName, "%s.retval", Name.c_str());
|
|
|
|
SDValue RetLabel = DAG.getTargetExternalSymbol(retName, MVT::i8);
|
|
|
|
|
|
|
|
// Pass the argument to function before making the call.
|
|
|
|
SDValue CallArgs = LowerCallArguments(Op, Chain, ArgLabel, OperFlag, DAG);
|
|
|
|
Chain = getChain(CallArgs);
|
|
|
|
OperFlag = getOutFlag(CallArgs);
|
|
|
|
|
|
|
|
SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag);
|
|
|
|
SDValue PICCall = DAG.getNode(PIC16ISD::CALL, Tys, Chain, Callee,
|
|
|
|
OperFlag);
|
|
|
|
Chain = getChain(PICCall);
|
|
|
|
OperFlag = getOutFlag(PICCall);
|
|
|
|
|
|
|
|
|
|
|
|
// Carrying the Constant 0 along the CALLSEQSTART
|
|
|
|
// because there is nothing else to carry.
|
|
|
|
SDValue SeqEnd = DAG.getCALLSEQ_END(Chain, ZeroOperand, ZeroOperand,
|
|
|
|
OperFlag);
|
|
|
|
Chain = getChain(SeqEnd);
|
|
|
|
OperFlag = getOutFlag(SeqEnd);
|
|
|
|
|
|
|
|
// Lower the return value reading after the call.
|
|
|
|
return LowerCallReturn(Op, Chain, RetLabel, OperFlag, DAG);
|
2008-11-19 11:00:54 +00:00
|
|
|
}
|
2008-05-13 09:02:57 +00:00
|
|
|
|
2009-01-13 19:18:47 +00:00
|
|
|
bool PIC16TargetLowering::isDirectLoad(const SDValue Op) {
|
|
|
|
if (Op.getOpcode() == PIC16ISD::PIC16Load)
|
|
|
|
if (Op.getOperand(1).getOpcode() == ISD::TargetGlobalAddress
|
|
|
|
|| Op.getOperand(1).getOpcode() == ISD::TargetExternalSymbol)
|
|
|
|
return true;
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool PIC16TargetLowering::NeedToConvertToMemOp(SDValue Op, unsigned &MemOp) {
|
|
|
|
// Return false if one of the operands is already a direct
|
|
|
|
// load and that operand has only one use.
|
|
|
|
if (Op.getOperand(0).getOpcode() == ISD::Constant ||
|
|
|
|
Op.getOperand(1).getOpcode() == ISD::Constant)
|
|
|
|
return false;
|
|
|
|
if (isDirectLoad(Op.getOperand(0))) {
|
|
|
|
if (Op.getOperand(0).hasOneUse())
|
|
|
|
return false;
|
|
|
|
else
|
|
|
|
MemOp = 0;
|
|
|
|
}
|
|
|
|
if (isDirectLoad(Op.getOperand(1))) {
|
|
|
|
if (Op.getOperand(1).hasOneUse())
|
|
|
|
return false;
|
|
|
|
else
|
|
|
|
MemOp = 1;
|
|
|
|
}
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
SDValue PIC16TargetLowering:: LowerBinOp(SDValue Op, SelectionDAG &DAG) {
|
2008-11-19 11:00:54 +00:00
|
|
|
// We should have handled larger operands in type legalizer itself.
|
2009-01-13 19:18:47 +00:00
|
|
|
assert (Op.getValueType() == MVT::i8 && "illegal Op to lower");
|
|
|
|
unsigned MemOp = 1;
|
|
|
|
if (NeedToConvertToMemOp(Op, MemOp)) {
|
|
|
|
// Put one value on stack.
|
|
|
|
SDValue NewVal = ConvertToMemOperand (Op.getOperand(MemOp), DAG);
|
2008-05-13 09:02:57 +00:00
|
|
|
|
2009-01-13 19:18:47 +00:00
|
|
|
return DAG.getNode(Op.getOpcode(), MVT::i8, Op.getOperand(MemOp ^ 1),
|
|
|
|
NewVal);
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
return Op;
|
|
|
|
}
|
|
|
|
}
|
2008-05-13 09:02:57 +00:00
|
|
|
|
2009-01-13 19:18:47 +00:00
|
|
|
SDValue PIC16TargetLowering:: LowerADD(SDValue Op, SelectionDAG &DAG) {
|
|
|
|
// We should have handled larger operands in type legalizer itself.
|
|
|
|
assert (Op.getValueType() == MVT::i8 && "illegal add to lower");
|
|
|
|
unsigned MemOp = 1;
|
|
|
|
if (NeedToConvertToMemOp(Op, MemOp)) {
|
|
|
|
// Put one value on stack.
|
|
|
|
SDValue NewVal = ConvertToMemOperand (Op.getOperand(MemOp), DAG);
|
|
|
|
|
|
|
|
SDVTList Tys = DAG.getVTList(MVT::i8, MVT::Flag);
|
2008-05-14 11:31:39 +00:00
|
|
|
|
2009-01-13 19:18:47 +00:00
|
|
|
if (Op.getOpcode() == ISD::ADDE)
|
|
|
|
return DAG.getNode(Op.getOpcode(), Tys, Op.getOperand(MemOp ^ 1), NewVal,
|
|
|
|
Op.getOperand(2));
|
|
|
|
else
|
|
|
|
return DAG.getNode(Op.getOpcode(), Tys, Op.getOperand(MemOp ^ 1), NewVal);
|
|
|
|
}
|
2009-01-21 05:44:05 +00:00
|
|
|
else if (Op.getOpcode() == ISD::ADD) {
|
|
|
|
return Op;
|
|
|
|
}
|
2009-01-13 19:18:47 +00:00
|
|
|
else {
|
|
|
|
return SDValue();
|
|
|
|
}
|
2008-11-19 11:00:54 +00:00
|
|
|
}
|
2008-05-14 11:31:39 +00:00
|
|
|
|
2009-01-13 19:18:47 +00:00
|
|
|
SDValue PIC16TargetLowering::LowerSUB(SDValue Op, SelectionDAG &DAG) {
|
2008-11-19 11:00:54 +00:00
|
|
|
// We should have handled larger operands in type legalizer itself.
|
2009-01-13 19:18:47 +00:00
|
|
|
assert (Op.getValueType() == MVT::i8 && "illegal sub to lower");
|
2008-05-14 11:31:39 +00:00
|
|
|
|
2009-01-13 19:18:47 +00:00
|
|
|
// Nothing to do if the first operand is already a direct load and it has
|
|
|
|
// only one use.
|
|
|
|
if (isDirectLoad(Op.getOperand(0)) && Op.getOperand(0).hasOneUse())
|
2008-11-19 11:00:54 +00:00
|
|
|
return SDValue();
|
2008-06-06 12:08:01 +00:00
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
// Put first operand on stack.
|
|
|
|
SDValue NewVal = ConvertToMemOperand (Op.getOperand(0), DAG);
|
2008-05-14 11:31:39 +00:00
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
SDVTList Tys = DAG.getVTList(MVT::i8, MVT::Flag);
|
2009-01-13 19:18:47 +00:00
|
|
|
if (Op.getOpcode() == ISD::SUBE)
|
|
|
|
return DAG.getNode(Op.getOpcode(), Tys, NewVal, Op.getOperand(1),
|
|
|
|
Op.getOperand(2));
|
|
|
|
else
|
|
|
|
return DAG.getNode(Op.getOpcode(), Tys, NewVal, Op.getOperand(1));
|
2008-11-19 11:00:54 +00:00
|
|
|
}
|
2008-05-14 11:31:39 +00:00
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
// LowerFORMAL_ARGUMENTS - In Lowering FORMAL ARGUMENTS - MERGE_VALUES nodes
|
|
|
|
// is returned. MERGE_VALUES nodes number of operands and number of values are
|
|
|
|
// equal. Therefore to construct MERGE_VALUE node, UNDEF nodes equal to the
|
|
|
|
// number of arguments of function have been created.
|
2008-05-14 11:31:39 +00:00
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
SDValue PIC16TargetLowering:: LowerFORMAL_ARGUMENTS(SDValue Op,
|
|
|
|
SelectionDAG &DAG) {
|
|
|
|
SmallVector<SDValue, 8> ArgValues;
|
|
|
|
unsigned NumArgs = Op.getNumOperands() - 3;
|
2008-05-13 09:02:57 +00:00
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
// Creating UNDEF nodes to meet the requirement of MERGE_VALUES node.
|
|
|
|
for(unsigned i = 0 ; i<NumArgs ; i++) {
|
|
|
|
SDValue TempNode = DAG.getNode(ISD::UNDEF, Op.getNode()->getValueType(i));
|
|
|
|
ArgValues.push_back(TempNode);
|
|
|
|
}
|
2008-05-13 09:02:57 +00:00
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
ArgValues.push_back(Op.getOperand(0));
|
|
|
|
return DAG.getNode(ISD::MERGE_VALUES, Op.getNode()->getVTList(),
|
|
|
|
&ArgValues[0],
|
|
|
|
ArgValues.size()).getValue(Op.getResNo());
|
2008-05-13 09:02:57 +00:00
|
|
|
}
|
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
// Perform DAGCombine of PIC16Load
|
|
|
|
SDValue PIC16TargetLowering::
|
|
|
|
PerformPIC16LoadCombine(SDNode *N, DAGCombinerInfo &DCI) const {
|
|
|
|
SelectionDAG &DAG = DCI.DAG;
|
|
|
|
SDValue Chain = N->getOperand(0);
|
|
|
|
if (N->hasNUsesOfValue(0, 0)) {
|
|
|
|
DAG.ReplaceAllUsesOfValueWith(SDValue(N,1), Chain);
|
2008-05-13 09:02:57 +00:00
|
|
|
}
|
2008-11-19 11:00:54 +00:00
|
|
|
return SDValue();
|
|
|
|
}
|
2008-05-13 09:02:57 +00:00
|
|
|
|
2008-11-19 11:00:54 +00:00
|
|
|
|
|
|
|
SDValue PIC16TargetLowering::PerformDAGCombine(SDNode *N,
|
|
|
|
DAGCombinerInfo &DCI) const {
|
|
|
|
switch (N->getOpcode()) {
|
|
|
|
case PIC16ISD::PIC16Load:
|
|
|
|
return PerformPIC16LoadCombine(N, DCI);
|
|
|
|
}
|
|
|
|
return SDValue();
|
2008-05-13 09:02:57 +00:00
|
|
|
}
|
2009-01-13 19:18:47 +00:00
|
|
|
|
|
|
|
static PIC16CC::CondCodes IntCCToPIC16CC(ISD::CondCode CC) {
|
|
|
|
switch (CC) {
|
|
|
|
default: assert(0 && "Unknown condition code!");
|
|
|
|
case ISD::SETNE: return PIC16CC::NE;
|
|
|
|
case ISD::SETEQ: return PIC16CC::EQ;
|
|
|
|
case ISD::SETGT: return PIC16CC::GT;
|
|
|
|
case ISD::SETGE: return PIC16CC::GE;
|
|
|
|
case ISD::SETLT: return PIC16CC::LT;
|
|
|
|
case ISD::SETLE: return PIC16CC::LE;
|
2009-01-21 05:44:05 +00:00
|
|
|
case ISD::SETULT: return PIC16CC::ULT;
|
2009-01-13 19:18:47 +00:00
|
|
|
case ISD::SETULE: return PIC16CC::LE;
|
|
|
|
case ISD::SETUGE: return PIC16CC::GE;
|
2009-01-21 05:44:05 +00:00
|
|
|
case ISD::SETUGT: return PIC16CC::UGT;
|
2009-01-13 19:18:47 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// Look at LHS/RHS/CC and see if they are a lowered setcc instruction. If so
|
|
|
|
// set LHS/RHS and SPCC to the LHS/RHS of the setcc and SPCC to the condition.
|
|
|
|
static void LookThroughSetCC(SDValue &LHS, SDValue &RHS,
|
|
|
|
ISD::CondCode CC, unsigned &SPCC) {
|
|
|
|
if (isa<ConstantSDNode>(RHS) &&
|
|
|
|
cast<ConstantSDNode>(RHS)->getZExtValue() == 0 &&
|
|
|
|
CC == ISD::SETNE &&
|
|
|
|
(LHS.getOpcode() == PIC16ISD::SELECT_ICC &&
|
|
|
|
LHS.getOperand(3).getOpcode() == PIC16ISD::SUBCC) &&
|
|
|
|
isa<ConstantSDNode>(LHS.getOperand(0)) &&
|
|
|
|
isa<ConstantSDNode>(LHS.getOperand(1)) &&
|
|
|
|
cast<ConstantSDNode>(LHS.getOperand(0))->getZExtValue() == 1 &&
|
|
|
|
cast<ConstantSDNode>(LHS.getOperand(1))->getZExtValue() == 0) {
|
|
|
|
SDValue CMPCC = LHS.getOperand(3);
|
|
|
|
SPCC = cast<ConstantSDNode>(LHS.getOperand(2))->getZExtValue();
|
|
|
|
LHS = CMPCC.getOperand(0);
|
|
|
|
RHS = CMPCC.getOperand(1);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// Returns appropriate CMP insn and corresponding condition code in PIC16CC
|
|
|
|
SDValue PIC16TargetLowering::getPIC16Cmp(SDValue LHS, SDValue RHS,
|
|
|
|
unsigned CC, SDValue &PIC16CC,
|
|
|
|
SelectionDAG &DAG) {
|
|
|
|
PIC16CC::CondCodes CondCode = (PIC16CC::CondCodes) CC;
|
|
|
|
|
|
|
|
// PIC16 sub is literal - W. So Swap the operands and condition if needed.
|
|
|
|
// i.e. a < 12 can be rewritten as 12 > a.
|
|
|
|
if (RHS.getOpcode() == ISD::Constant) {
|
|
|
|
|
|
|
|
SDValue Tmp = LHS;
|
|
|
|
LHS = RHS;
|
|
|
|
RHS = Tmp;
|
|
|
|
|
|
|
|
switch (CondCode) {
|
|
|
|
default: break;
|
|
|
|
case PIC16CC::LT:
|
|
|
|
CondCode = PIC16CC::GT;
|
|
|
|
break;
|
|
|
|
case PIC16CC::GT:
|
|
|
|
CondCode = PIC16CC::LT;
|
|
|
|
break;
|
2009-01-21 05:44:05 +00:00
|
|
|
case PIC16CC::ULT:
|
|
|
|
CondCode = PIC16CC::UGT;
|
|
|
|
break;
|
|
|
|
case PIC16CC::UGT:
|
|
|
|
CondCode = PIC16CC::ULT;
|
|
|
|
break;
|
2009-01-13 19:18:47 +00:00
|
|
|
case PIC16CC::GE:
|
|
|
|
CondCode = PIC16CC::LE;
|
|
|
|
break;
|
|
|
|
case PIC16CC::LE:
|
|
|
|
CondCode = PIC16CC::GE;
|
|
|
|
break;
|
2009-01-21 05:44:05 +00:00
|
|
|
case PIC16CC::ULE:
|
|
|
|
CondCode = PIC16CC::UGE;
|
|
|
|
break;
|
|
|
|
case PIC16CC::UGE:
|
|
|
|
CondCode = PIC16CC::ULE;
|
|
|
|
break;
|
2009-01-13 19:18:47 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
PIC16CC = DAG.getConstant(CondCode, MVT::i8);
|
|
|
|
SDVTList VTs = DAG.getVTList (MVT::i8, MVT::Flag);
|
|
|
|
|
2009-01-21 05:44:05 +00:00
|
|
|
// These are signed comparisons.
|
|
|
|
SDValue Mask = DAG.getConstant(128, MVT::i8);
|
|
|
|
if (isSignedComparison(CondCode)) {
|
|
|
|
LHS = DAG.getNode (ISD::XOR, MVT::i8, LHS, Mask);
|
|
|
|
RHS = DAG.getNode (ISD::XOR, MVT::i8, RHS, Mask);
|
|
|
|
}
|
2009-01-13 19:18:47 +00:00
|
|
|
// We can use a subtract operation to set the condition codes. But
|
|
|
|
// we need to put one operand in memory if required.
|
|
|
|
// Nothing to do if the first operand is already a direct load and it has
|
|
|
|
// only one use.
|
|
|
|
if (! (isDirectLoad(LHS) && LHS.hasOneUse()))
|
|
|
|
// Put first operand on stack.
|
|
|
|
LHS = ConvertToMemOperand (LHS, DAG);
|
|
|
|
|
|
|
|
SDVTList Tys = DAG.getVTList(MVT::i8, MVT::Flag);
|
|
|
|
return DAG.getNode(PIC16ISD::SUBCC, VTs, LHS, RHS);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
SDValue PIC16TargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) {
|
|
|
|
SDValue LHS = Op.getOperand(0);
|
|
|
|
SDValue RHS = Op.getOperand(1);
|
|
|
|
ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
|
|
|
|
SDValue TrueVal = Op.getOperand(2);
|
|
|
|
SDValue FalseVal = Op.getOperand(3);
|
|
|
|
unsigned ORIGCC = ~0;
|
|
|
|
|
|
|
|
// If this is a select_cc of a "setcc", and if the setcc got lowered into
|
|
|
|
// an CMP[IF]CC/SELECT_[IF]CC pair, find the original compared values.
|
|
|
|
// i.e.
|
|
|
|
// A setcc: lhs, rhs, cc is expanded by llvm to
|
|
|
|
// select_cc: result of setcc, 0, 1, 0, setne
|
|
|
|
// We can think of it as:
|
|
|
|
// select_cc: lhs, rhs, 1, 0, cc
|
|
|
|
LookThroughSetCC(LHS, RHS, CC, ORIGCC);
|
|
|
|
if (ORIGCC == ~0U) ORIGCC = IntCCToPIC16CC (CC);
|
|
|
|
|
|
|
|
SDValue PIC16CC;
|
|
|
|
SDValue Cmp = getPIC16Cmp(LHS, RHS, ORIGCC, PIC16CC, DAG);
|
|
|
|
|
|
|
|
return DAG.getNode (PIC16ISD::SELECT_ICC, TrueVal.getValueType(), TrueVal,
|
|
|
|
FalseVal, PIC16CC, Cmp.getValue(1));
|
|
|
|
}
|
|
|
|
|
|
|
|
MachineBasicBlock *
|
|
|
|
PIC16TargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
|
|
|
|
MachineBasicBlock *BB) {
|
|
|
|
const TargetInstrInfo &TII = *getTargetMachine().getInstrInfo();
|
|
|
|
unsigned CC = (PIC16CC::CondCodes)MI->getOperand(3).getImm();
|
|
|
|
|
|
|
|
// To "insert" a SELECT_CC instruction, we actually have to insert the diamond
|
|
|
|
// control-flow pattern. The incoming instruction knows the destination vreg
|
|
|
|
// to set, the condition code register to branch on, the true/false values to
|
|
|
|
// select between, and a branch opcode to use.
|
|
|
|
const BasicBlock *LLVM_BB = BB->getBasicBlock();
|
|
|
|
MachineFunction::iterator It = BB;
|
|
|
|
++It;
|
|
|
|
|
|
|
|
// thisMBB:
|
|
|
|
// ...
|
|
|
|
// TrueVal = ...
|
|
|
|
// [f]bCC copy1MBB
|
|
|
|
// fallthrough --> copy0MBB
|
|
|
|
MachineBasicBlock *thisMBB = BB;
|
|
|
|
MachineFunction *F = BB->getParent();
|
|
|
|
MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB);
|
|
|
|
MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB);
|
|
|
|
BuildMI(BB, TII.get(PIC16::pic16brcond)).addMBB(sinkMBB).addImm(CC);
|
|
|
|
F->insert(It, copy0MBB);
|
|
|
|
F->insert(It, sinkMBB);
|
|
|
|
|
|
|
|
// Update machine-CFG edges by transferring all successors of the current
|
|
|
|
// block to the new block which will contain the Phi node for the select.
|
|
|
|
sinkMBB->transferSuccessors(BB);
|
|
|
|
// Next, add the true and fallthrough blocks as its successors.
|
|
|
|
BB->addSuccessor(copy0MBB);
|
|
|
|
BB->addSuccessor(sinkMBB);
|
|
|
|
|
|
|
|
// copy0MBB:
|
|
|
|
// %FalseValue = ...
|
|
|
|
// # fallthrough to sinkMBB
|
|
|
|
BB = copy0MBB;
|
|
|
|
|
|
|
|
// Update machine-CFG edges
|
|
|
|
BB->addSuccessor(sinkMBB);
|
|
|
|
|
|
|
|
// sinkMBB:
|
|
|
|
// %Result = phi [ %FalseValue, copy0MBB ], [ %TrueValue, thisMBB ]
|
|
|
|
// ...
|
|
|
|
BB = sinkMBB;
|
|
|
|
BuildMI(BB, TII.get(PIC16::PHI), MI->getOperand(0).getReg())
|
|
|
|
.addReg(MI->getOperand(2).getReg()).addMBB(copy0MBB)
|
|
|
|
.addReg(MI->getOperand(1).getReg()).addMBB(thisMBB);
|
|
|
|
|
|
|
|
F->DeleteMachineInstr(MI); // The pseudo instruction is gone now.
|
|
|
|
return BB;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
SDValue PIC16TargetLowering::LowerBR_CC(SDValue Op, SelectionDAG &DAG) {
|
|
|
|
SDValue Chain = Op.getOperand(0);
|
|
|
|
ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
|
|
|
|
SDValue LHS = Op.getOperand(2); // LHS of the condition.
|
|
|
|
SDValue RHS = Op.getOperand(3); // RHS of the condition.
|
|
|
|
SDValue Dest = Op.getOperand(4); // BB to jump to
|
|
|
|
unsigned ORIGCC = ~0;
|
|
|
|
|
|
|
|
// If this is a br_cc of a "setcc", and if the setcc got lowered into
|
|
|
|
// an CMP[IF]CC/SELECT_[IF]CC pair, find the original compared values.
|
|
|
|
LookThroughSetCC(LHS, RHS, CC, ORIGCC);
|
|
|
|
if (ORIGCC == ~0U) ORIGCC = IntCCToPIC16CC (CC);
|
|
|
|
|
|
|
|
// Get the Compare insn and condition code.
|
|
|
|
SDValue PIC16CC;
|
|
|
|
SDValue Cmp = getPIC16Cmp(LHS, RHS, ORIGCC, PIC16CC, DAG);
|
|
|
|
|
|
|
|
return DAG.getNode(PIC16ISD::BRCOND, MVT::Other, Chain, Dest, PIC16CC,
|
|
|
|
Cmp.getValue(1));
|
|
|
|
}
|
|
|
|
|
|
|
|
|