llvm-6502/test/CodeGen/X86/avx512-vselect-crash.ll

; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s

; CHECK-LABEL: test
; CHECK: vpxord
; CHECK: ret
define <16 x i32> @test() {
entry:
  %0 = icmp slt <16 x i32> undef, undef
  %1 = select <16 x i1> %0, <16 x i32> undef, <16 x i32> zeroinitializer
  ret <16 x i32> %1
}
Suppress '(x < y) ? a : 0 -> (x < y) & a' transform on X86 architectures with dedicated mask registers. Patch by Aleksey Bader. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196386 91177308-0d34-0410-b5e6-96231b3b80d8 2013-12-04 14:52:33 +00:00			`; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl \| FileCheck %s`

			`; CHECK-LABEL: test`
Teach the DAGCombiner how to fold 'vselect' dag nodes according to the following two rules: 1) fold (vselect (build_vector AllOnes), A, B) -> A 2) fold (vselect (build_vector AllZeros), A, B) -> B git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198777 91177308-0d34-0410-b5e6-96231b3b80d8 2014-01-08 18:33:04 +00:00			`; CHECK: vpxord`
Suppress '(x < y) ? a : 0 -> (x < y) & a' transform on X86 architectures with dedicated mask registers. Patch by Aleksey Bader. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196386 91177308-0d34-0410-b5e6-96231b3b80d8 2013-12-04 14:52:33 +00:00			`; CHECK: ret`
			`define <16 x i32> @test() {`
			`entry:`
			`%0 = icmp slt <16 x i32> undef, undef`
			`%1 = select <16 x i1> %0, <16 x i32> undef, <16 x i32> zeroinitializer`
			`ret <16 x i32> %1`
			`}`