llvm-6502/test/CodeGen/X86/fastcc-2.ll

; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | FileCheck %s
; CHECK: movsd
; CHECK-NOT: mov

define i32 @foo() nounwind {
entry:
	tail call fastcc void @bar( double 1.000000e+00 ) nounwind
	ret i32 0
}

declare fastcc void @bar(double)
Rewrite some of the test/CodeGen/X86 tests to use FileCheck instead of grep git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179241 91177308-0d34-0410-b5e6-96231b3b80d8 2013-04-10 23:30:20 +00:00			`; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 \| FileCheck %s`
			`; CHECK: movsd`
			`; CHECK-NOT: mov`
If SSE2 is available, x86 should pass first 3 f32/f64 arguments in XMM registers for fastcc calls. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55840 91177308-0d34-0410-b5e6-96231b3b80d8 2008-09-05 17:24:07 +00:00
			`define i32 @foo() nounwind {`
			`entry:`
			`tail call fastcc void @bar( double 1.000000e+00 ) nounwind`
			`ret i32 0`
			`}`

			`declare fastcc void @bar(double)`