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llvm-6502/test/CodeGen/AArch64/arm64-large-frame.ll

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AArch64/ARM64: more testing from AArch64 to ARM64 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206889 91177308-0d34-0410-b5e6-96231b3b80d8
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; RUN: llc -verify-machineinstrs -mtriple=arm64-none-linux-gnu -disable-fp-elim < %s | FileCheck %s
declare void @use_addr(i8*)
@addr = global i8* null
define void @test_bigframe() {
; CHECK-LABEL: test_bigframe:
; CHECK: .cfi_startproc
%var1 = alloca i8, i32 20000000
%var2 = alloca i8, i32 16
%var3 = alloca i8, i32 20000000
ARM64: print canonical syntax for add/sub (imm) instructions. Since these instructions only accept a 12-bit immediate, possibly shifted left by 12, the canonical syntax used by the architecture reference manual is "#N {, lsl #12 }". We should accept an immediate that has already been shifted, (e.g. Also, print a comment giving the full addend since it can be helpful. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207633 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-30 11:19:15 +00:00
; CHECK: sub sp, sp, #4095, lsl #12
; CHECK: sub sp, sp, #4095, lsl #12
; CHECK: sub sp, sp, #1575, lsl #12
AArch64/ARM64: more testing from AArch64 to ARM64 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206889 91177308-0d34-0410-b5e6-96231b3b80d8
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; CHECK: sub sp, sp, #2576
; CHECK: .cfi_def_cfa_offset 40000032
ARM64: print canonical syntax for add/sub (imm) instructions. Since these instructions only accept a 12-bit immediate, possibly shifted left by 12, the canonical syntax used by the architecture reference manual is "#N {, lsl #12 }". We should accept an immediate that has already been shifted, (e.g. Also, print a comment giving the full addend since it can be helpful. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207633 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-30 11:19:15 +00:00
; CHECK: add [[TMP:x[0-9]+]], sp, #4095, lsl #12
; CHECK: add [[TMP1:x[0-9]+]], [[TMP]], #787, lsl #12
AArch64/ARM64: more testing from AArch64 to ARM64 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206889 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-22 12:45:47 +00:00
; CHECK: add {{x[0-9]+}}, [[TMP1]], #3344
store volatile i8* %var1, i8** @addr
%var1plus2 = getelementptr i8* %var1, i32 2
store volatile i8* %var1plus2, i8** @addr
ARM64: print canonical syntax for add/sub (imm) instructions. Since these instructions only accept a 12-bit immediate, possibly shifted left by 12, the canonical syntax used by the architecture reference manual is "#N {, lsl #12 }". We should accept an immediate that has already been shifted, (e.g. Also, print a comment giving the full addend since it can be helpful. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207633 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-30 11:19:15 +00:00
; CHECK: add [[TMP:x[0-9]+]], sp, #4095, lsl #12
; CHECK: add [[TMP1:x[0-9]+]], [[TMP]], #787, lsl #12
AArch64/ARM64: more testing from AArch64 to ARM64 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206889 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-22 12:45:47 +00:00
; CHECK: add {{x[0-9]+}}, [[TMP1]], #3328
store volatile i8* %var2, i8** @addr
%var2plus2 = getelementptr i8* %var2, i32 2
store volatile i8* %var2plus2, i8** @addr
store volatile i8* %var3, i8** @addr
%var3plus2 = getelementptr i8* %var3, i32 2
store volatile i8* %var3plus2, i8** @addr
ARM64: print canonical syntax for add/sub (imm) instructions. Since these instructions only accept a 12-bit immediate, possibly shifted left by 12, the canonical syntax used by the architecture reference manual is "#N {, lsl #12 }". We should accept an immediate that has already been shifted, (e.g. Also, print a comment giving the full addend since it can be helpful. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207633 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-30 11:19:15 +00:00
; CHECK: add sp, sp, #4095, lsl #12
; CHECK: add sp, sp, #4095, lsl #12
; CHECK: add sp, sp, #1575, lsl #12
AArch64/ARM64: more testing from AArch64 to ARM64 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206889 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-22 12:45:47 +00:00
; CHECK: add sp, sp, #2576
; CHECK: .cfi_endproc
ret void
}
define void @test_mediumframe() {
; CHECK-LABEL: test_mediumframe:
%var1 = alloca i8, i32 1000000
%var2 = alloca i8, i32 16
%var3 = alloca i8, i32 1000000
ARM64: print canonical syntax for add/sub (imm) instructions. Since these instructions only accept a 12-bit immediate, possibly shifted left by 12, the canonical syntax used by the architecture reference manual is "#N {, lsl #12 }". We should accept an immediate that has already been shifted, (e.g. Also, print a comment giving the full addend since it can be helpful. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207633 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-30 11:19:15 +00:00
; CHECK: sub sp, sp, #488, lsl #12
AArch64/ARM64: more testing from AArch64 to ARM64 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206889 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-22 12:45:47 +00:00
; CHECK-NEXT: sub sp, sp, #1168
store volatile i8* %var1, i8** @addr
ARM64: print canonical syntax for add/sub (imm) instructions. Since these instructions only accept a 12-bit immediate, possibly shifted left by 12, the canonical syntax used by the architecture reference manual is "#N {, lsl #12 }". We should accept an immediate that has already been shifted, (e.g. Also, print a comment giving the full addend since it can be helpful. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207633 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-30 11:19:15 +00:00
; CHECK: add [[VAR1ADDR:x[0-9]+]], sp, #244, lsl #12
AArch64/ARM64: more testing from AArch64 to ARM64 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206889 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-22 12:45:47 +00:00
; CHECK: add [[VAR1ADDR]], [[VAR1ADDR]], #592
ARM64: print canonical syntax for add/sub (imm) instructions. Since these instructions only accept a 12-bit immediate, possibly shifted left by 12, the canonical syntax used by the architecture reference manual is "#N {, lsl #12 }". We should accept an immediate that has already been shifted, (e.g. Also, print a comment giving the full addend since it can be helpful. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207633 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-30 11:19:15 +00:00
; CHECK: add [[VAR2ADDR:x[0-9]+]], sp, #244, lsl #12
AArch64/ARM64: more testing from AArch64 to ARM64 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206889 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-22 12:45:47 +00:00
; CHECK: add [[VAR2ADDR]], [[VAR2ADDR]], #576
store volatile i8* %var2, i8** @addr
ARM64: print canonical syntax for add/sub (imm) instructions. Since these instructions only accept a 12-bit immediate, possibly shifted left by 12, the canonical syntax used by the architecture reference manual is "#N {, lsl #12 }". We should accept an immediate that has already been shifted, (e.g. Also, print a comment giving the full addend since it can be helpful. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207633 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-30 11:19:15 +00:00
; CHECK: add sp, sp, #488, lsl #12
AArch64/ARM64: more testing from AArch64 to ARM64 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206889 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-22 12:45:47 +00:00
; CHECK: add sp, sp, #1168
ret void
}
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