llvm-6502/test/MC/ARM/directive-cpu.s

@ RUN: llvm-mc < %s -triple armv7-unknown-linux-gnueabi -filetype=obj -o - \
@ RUN:   | llvm-readobj -s -sd | FileCheck %s

@ CHECK: Name: .ARM.attribute
@ CHECK: SectionData (

@ <format-version>
@ CHECK: 41

@ <section-length>
@ CHECK: 1A0000 00

@ <vendor-name> "aeabi\0"
@ CHECK: 616561 626900

@ <file-tag>
@ CHECK: 01

@ <size>
@ CHECK: 10000000

	.cpu	cortex-a8
@ CHECK: 05
@ CHECK: 434F52 5445582D 413800

@ CHECK: )
[arm] Implement eabi_attribute, cpu, and fpu directives. This commit allows the ARM integrated assembler to parse and assemble the code with .eabi_attribute, .cpu, and .fpu directives. To implement the feature, this commit moves the code from AttrEmitter to ARMTargetStreamers, and several new test cases related to cortex-m4, cortex-r5, and cortex-a15 are added. Besides, this commit also change the Subtarget->isFPOnlySP() to Subtarget->hasD16() to match the usage of .fpu directive. This commit changes the test cases: * Several .eabi_attribute directives in 2010-09-29-mc-asm-header-test.ll are removed because the .fpu directive already cover the functionality. * In the Cortex-A15 test case, the value for Tag_Advanced_SIMD_arch has be changed from 1 to 2, which is more precise. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193524 91177308-0d34-0410-b5e6-96231b3b80d8 2013-10-28 17:51:12 +00:00			`@ RUN: llvm-mc < %s -triple armv7-unknown-linux-gnueabi -filetype=obj -o - \`
			`@ RUN: \| llvm-readobj -s -sd \| FileCheck %s`

			`@ CHECK: Name: .ARM.attribute`
			`@ CHECK: SectionData (`

			`@ <format-version>`
			`@ CHECK: 41`

			`@ <section-length>`
			`@ CHECK: 1A0000 00`

			`@ <vendor-name> "aeabi\0"`
			`@ CHECK: 616561 626900`

			`@ <file-tag>`
			`@ CHECK: 01`

			`@ <size>`
			`@ CHECK: 10000000`

			`.cpu cortex-a8`
			`@ CHECK: 05`
			`@ CHECK: 434F52 5445582D 413800`

			`@ CHECK: )`