llvm-6502/test/CodeGen/X86/sse-align-10.ll

; RUN: llvm-as < %s | llc -march=x86-64 | grep movups | count 1

define <2 x i64> @bar(<2 x i64>* %p) nounwind {
  %t = load <2 x i64>* %p, align 8
  ret <2 x i64> %t
}
Convert tests using "\| wc -l \| grep ..." to use the count script. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41097 91177308-0d34-0410-b5e6-96231b3b80d8 2007-08-15 13:36:28 +00:00			`; RUN: llvm-as < %s \| llc -march=x86-64 \| grep movups \| count 1`
Implement initial memory alignment awareness for SSE instructions. Vector loads and stores that have a specified alignment of less than 16 bytes now use instructions that support misaligned memory references. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40015 91177308-0d34-0410-b5e6-96231b3b80d8 2007-07-18 20:23:34 +00:00
Add nounwind. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50837 91177308-0d34-0410-b5e6-96231b3b80d8 2008-05-07 22:59:08 +00:00			`define <2 x i64> @bar(<2 x i64>* %p) nounwind {`
Implement initial memory alignment awareness for SSE instructions. Vector loads and stores that have a specified alignment of less than 16 bytes now use instructions that support misaligned memory references. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40015 91177308-0d34-0410-b5e6-96231b3b80d8 2007-07-18 20:23:34 +00:00			`%t = load <2 x i64>* %p, align 8`
			`ret <2 x i64> %t`
			`}`