llvm-6502/test/CodeGen/R600/unaligned-load-store.ll

; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI %s

; SI-LABEL: @unaligned_load_store_i32:
; DS_READ_U32 {{v[0-9]+}}, 0, [[REG]]
define void @unaligned_load_store_i32(i32 addrspace(3)* %p, i32 addrspace(3)* %r) nounwind {
  %v = load i32 addrspace(3)* %p, align 1
  store i32 %v, i32 addrspace(3)* %r, align 1
  ret void
}

; SI-LABEL: @unaligned_load_store_v4i32:
; DS_READ_U32 {{v[0-9]+}}, 0, [[REG]]
define void @unaligned_load_store_v4i32(<4 x i32> addrspace(3)* %p, <4 x i32> addrspace(3)* %r) nounwind {
  %v = load <4 x i32> addrspace(3)* %p, align 1
  store <4 x i32> %v, <4 x i32> addrspace(3)* %r, align 1
  ret void
}
R600/SI: Custom lower SI_IF and SI_ELSE to avoid machine verifier errors SI_IF and SI_ELSE are terminators which also produce a value. For these instructions ISel always inserts a COPY to move their value to another basic block. This COPY ends up between SI_(IF\|ELSE) and the S_BRANCH* instruction at the end of the block. This breaks MachineBasicBlock::getFirstTerminator() and also the machine verifier which assumes that terminators are grouped together at the end of blocks. To solve this we coalesce the copy away right after ISel to make sure there are no instructions in between terminators at the end of blocks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207591 91177308-0d34-0410-b5e6-96231b3b80d8 2014-04-29 23:12:53 +00:00			`; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs< %s \| FileCheck -check-prefix=SI %s`
Fix CodeGen for unaligned loads with address spaces git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193721 91177308-0d34-0410-b5e6-96231b3b80d8 2013-10-30 23:30:05 +00:00
			`; SI-LABEL: @unaligned_load_store_i32:`
R600/SI: Add support for private address space load/store Private address space is emulated using the register file with MOVRELS and MOVRELD instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194626 91177308-0d34-0410-b5e6-96231b3b80d8 2013-11-13 23:36:50 +00:00			`; DS_READ_U32 {{v[0-9]+}}, 0, [[REG]]`
Fix CodeGen for unaligned loads with address spaces git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193721 91177308-0d34-0410-b5e6-96231b3b80d8 2013-10-30 23:30:05 +00:00			`define void @unaligned_load_store_i32(i32 addrspace(3)* %p, i32 addrspace(3)* %r) nounwind {`
			`%v = load i32 addrspace(3)* %p, align 1`
			`store i32 %v, i32 addrspace(3)* %r, align 1`
			`ret void`
			`}`

			`; SI-LABEL: @unaligned_load_store_v4i32:`
R600/SI: Add support for private address space load/store Private address space is emulated using the register file with MOVRELS and MOVRELD instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194626 91177308-0d34-0410-b5e6-96231b3b80d8 2013-11-13 23:36:50 +00:00			`; DS_READ_U32 {{v[0-9]+}}, 0, [[REG]]`
Fix CodeGen for unaligned loads with address spaces git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193721 91177308-0d34-0410-b5e6-96231b3b80d8 2013-10-30 23:30:05 +00:00			`define void @unaligned_load_store_v4i32(<4 x i32> addrspace(3)* %p, <4 x i32> addrspace(3)* %r) nounwind {`
			`%v = load <4 x i32> addrspace(3)* %p, align 1`
			`store <4 x i32> %v, <4 x i32> addrspace(3)* %r, align 1`
			`ret void`
			`}`