llvm-6502/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll

; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movups | count 2

define void @a(<4 x float>* %x) nounwind  {
entry:
        %tmp2 = load <4 x float>* %x, align 1
        %inv = call <4 x float> @llvm.x86.sse.rcp.ps(<4 x float> %tmp2)
        store <4 x float> %inv, <4 x float>* %x, align 1
        ret void
}

declare <4 x float> @llvm.x86.sse.rcp.ps(<4 x float>)
Eliminate more uses of llvm-as and llvm-dis. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81290 91177308-0d34-0410-b5e6-96231b3b80d8 2009-09-08 23:54:48 +00:00			`; RUN: llc < %s -march=x86 -mattr=+sse2 \| grep movups \| count 2`
Bug: rcpps can only folds a load if the address is 16-byte aligned. Fixed many 'ps' load folding patterns in X86InstrSSE.td which are missing the proper alignment checks. Also fixed some 80 col. violations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51462 91177308-0d34-0410-b5e6-96231b3b80d8 2008-05-23 00:37:07 +00:00
			`define void @a(<4 x float>* %x) nounwind {`
			`entry:`
			`%tmp2 = load <4 x float>* %x, align 1`
			`%inv = call <4 x float> @llvm.x86.sse.rcp.ps(<4 x float> %tmp2)`
			`store <4 x float> %inv, <4 x float>* %x, align 1`
			`ret void`
			`}`

			`declare <4 x float> @llvm.x86.sse.rcp.ps(<4 x float>)`