2014-03-08 02:45:53 +00:00
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|
; RUN: llc < %s -filetype=obj | llvm-dwarfdump -debug-dump=info - | FileCheck %s
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|
; RUN: llc < %s -filetype=obj -regalloc=basic | llvm-dwarfdump -debug-dump=info - | FileCheck %s
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2011-01-24 19:24:37 +00:00
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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target triple = "x86_64-apple-darwin10.0.0"
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; Check debug info for variable z_s
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2014-03-08 02:45:53 +00:00
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; CHECK: DW_TAG_subprogram
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; CHECK: DW_TAG_subprogram
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; CHECK: DW_TAG_variable
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; CHECK: DW_TAG_variable
|
2014-06-13 22:18:23 +00:00
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; CHECK-NEXT: DW_AT_location
|
2014-03-08 02:45:53 +00:00
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; CHECK-NEXT: DW_AT_name {{.*}} "z_s"
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2014-03-14 23:08:21 +00:00
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; CHECK-NEXT: DW_AT_decl_file
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; CHECK-NEXT: DW_AT_decl_line
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; CHECK-NEXT: DW_AT_type{{.*}}{[[TYPE:.*]]}
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; CHECK: [[TYPE]]:
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; CHECK-NEXT: DW_AT_name {{.*}} "int"
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2011-01-24 19:24:37 +00:00
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@.str1 = private unnamed_addr constant [14 x i8] c"m=%u, z_s=%d\0A\00"
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@str = internal constant [21 x i8] c"Failing test vector:\00"
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define i64 @gcd(i64 %a, i64 %b) nounwind readnone optsize noinline ssp {
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entry:
|
Move the complex address expression out of DIVariable and into an extra
argument of the llvm.dbg.declare/llvm.dbg.value intrinsics.
Previously, DIVariable was a variable-length field that has an optional
reference to a Metadata array consisting of a variable number of
complex address expressions. In the case of OpPiece expressions this is
wasting a lot of storage in IR, because when an aggregate type is, e.g.,
SROA'd into all of its n individual members, the IR will contain n copies
of the DIVariable, all alike, only differing in the complex address
reference at the end.
By making the complex address into an extra argument of the
dbg.value/dbg.declare intrinsics, all of the pieces can reference the
same variable and the complex address expressions can be uniqued across
the CU, too.
Down the road, this will allow us to move other flags, such as
"indirection" out of the DIVariable, too.
The new intrinsics look like this:
declare void @llvm.dbg.declare(metadata %storage, metadata %var, metadata %expr)
declare void @llvm.dbg.value(metadata %storage, i64 %offset, metadata %var, metadata %expr)
This patch adds a new LLVM-local tag to DIExpressions, so we can detect
and pretty-print DIExpression metadata nodes.
What this patch doesn't do:
This patch does not touch the "Indirect" field in DIVariable; but moving
that into the expression would be a natural next step.
http://reviews.llvm.org/D4919
rdar://problem/17994491
Thanks to dblaikie and dexonsmith for reviewing this patch!
Note: I accidentally committed a bogus older version of this patch previously.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218787 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-01 18:55:02 +00:00
|
|
|
tail call void @llvm.dbg.value(metadata !{i64 %a}, i64 0, metadata !10, metadata !{i32 786690}), !dbg !18
|
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|
tail call void @llvm.dbg.value(metadata !{i64 %b}, i64 0, metadata !11, metadata !{i32 786690}), !dbg !19
|
2011-01-24 19:24:37 +00:00
|
|
|
br label %while.body, !dbg !20
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|
while.body: ; preds = %while.body, %entry
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|
|
%b.addr.0 = phi i64 [ %b, %entry ], [ %rem, %while.body ]
|
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|
|
%a.addr.0 = phi i64 [ %a, %entry ], [ %b.addr.0, %while.body ]
|
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|
|
%rem = srem i64 %a.addr.0, %b.addr.0, !dbg !21
|
|
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|
|
%cmp = icmp eq i64 %rem, 0, !dbg !23
|
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|
|
br i1 %cmp, label %if.then, label %while.body, !dbg !23
|
|
|
|
|
|
|
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|
|
if.then: ; preds = %while.body
|
Move the complex address expression out of DIVariable and into an extra
argument of the llvm.dbg.declare/llvm.dbg.value intrinsics.
Previously, DIVariable was a variable-length field that has an optional
reference to a Metadata array consisting of a variable number of
complex address expressions. In the case of OpPiece expressions this is
wasting a lot of storage in IR, because when an aggregate type is, e.g.,
SROA'd into all of its n individual members, the IR will contain n copies
of the DIVariable, all alike, only differing in the complex address
reference at the end.
By making the complex address into an extra argument of the
dbg.value/dbg.declare intrinsics, all of the pieces can reference the
same variable and the complex address expressions can be uniqued across
the CU, too.
Down the road, this will allow us to move other flags, such as
"indirection" out of the DIVariable, too.
The new intrinsics look like this:
declare void @llvm.dbg.declare(metadata %storage, metadata %var, metadata %expr)
declare void @llvm.dbg.value(metadata %storage, i64 %offset, metadata %var, metadata %expr)
This patch adds a new LLVM-local tag to DIExpressions, so we can detect
and pretty-print DIExpression metadata nodes.
What this patch doesn't do:
This patch does not touch the "Indirect" field in DIVariable; but moving
that into the expression would be a natural next step.
http://reviews.llvm.org/D4919
rdar://problem/17994491
Thanks to dblaikie and dexonsmith for reviewing this patch!
Note: I accidentally committed a bogus older version of this patch previously.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218787 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-01 18:55:02 +00:00
|
|
|
tail call void @llvm.dbg.value(metadata !{i64 %rem}, i64 0, metadata !12, metadata !{i32 786690}), !dbg !21
|
2011-01-24 19:24:37 +00:00
|
|
|
ret i64 %b.addr.0, !dbg !23
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
define i32 @main() nounwind optsize ssp {
|
|
|
|
|
entry:
|
|
|
|
|
%call = tail call i32 @rand() nounwind optsize, !dbg !24
|
Move the complex address expression out of DIVariable and into an extra
argument of the llvm.dbg.declare/llvm.dbg.value intrinsics.
Previously, DIVariable was a variable-length field that has an optional
reference to a Metadata array consisting of a variable number of
complex address expressions. In the case of OpPiece expressions this is
wasting a lot of storage in IR, because when an aggregate type is, e.g.,
SROA'd into all of its n individual members, the IR will contain n copies
of the DIVariable, all alike, only differing in the complex address
reference at the end.
By making the complex address into an extra argument of the
dbg.value/dbg.declare intrinsics, all of the pieces can reference the
same variable and the complex address expressions can be uniqued across
the CU, too.
Down the road, this will allow us to move other flags, such as
"indirection" out of the DIVariable, too.
The new intrinsics look like this:
declare void @llvm.dbg.declare(metadata %storage, metadata %var, metadata %expr)
declare void @llvm.dbg.value(metadata %storage, i64 %offset, metadata %var, metadata %expr)
This patch adds a new LLVM-local tag to DIExpressions, so we can detect
and pretty-print DIExpression metadata nodes.
What this patch doesn't do:
This patch does not touch the "Indirect" field in DIVariable; but moving
that into the expression would be a natural next step.
http://reviews.llvm.org/D4919
rdar://problem/17994491
Thanks to dblaikie and dexonsmith for reviewing this patch!
Note: I accidentally committed a bogus older version of this patch previously.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218787 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-01 18:55:02 +00:00
|
|
|
tail call void @llvm.dbg.value(metadata !{i32 %call}, i64 0, metadata !14, metadata !{i32 786690}), !dbg !24
|
2011-01-24 19:24:37 +00:00
|
|
|
%cmp = icmp ugt i32 %call, 21, !dbg !25
|
|
|
|
|
br i1 %cmp, label %cond.true, label %cond.end, !dbg !25
|
|
|
|
|
|
|
|
|
|
cond.true: ; preds = %entry
|
|
|
|
|
%call1 = tail call i32 @rand() nounwind optsize, !dbg !25
|
|
|
|
|
br label %cond.end, !dbg !25
|
|
|
|
|
|
|
|
|
|
cond.end: ; preds = %entry, %cond.true
|
|
|
|
|
%cond = phi i32 [ %call1, %cond.true ], [ %call, %entry ], !dbg !25
|
Move the complex address expression out of DIVariable and into an extra
argument of the llvm.dbg.declare/llvm.dbg.value intrinsics.
Previously, DIVariable was a variable-length field that has an optional
reference to a Metadata array consisting of a variable number of
complex address expressions. In the case of OpPiece expressions this is
wasting a lot of storage in IR, because when an aggregate type is, e.g.,
SROA'd into all of its n individual members, the IR will contain n copies
of the DIVariable, all alike, only differing in the complex address
reference at the end.
By making the complex address into an extra argument of the
dbg.value/dbg.declare intrinsics, all of the pieces can reference the
same variable and the complex address expressions can be uniqued across
the CU, too.
Down the road, this will allow us to move other flags, such as
"indirection" out of the DIVariable, too.
The new intrinsics look like this:
declare void @llvm.dbg.declare(metadata %storage, metadata %var, metadata %expr)
declare void @llvm.dbg.value(metadata %storage, i64 %offset, metadata %var, metadata %expr)
This patch adds a new LLVM-local tag to DIExpressions, so we can detect
and pretty-print DIExpression metadata nodes.
What this patch doesn't do:
This patch does not touch the "Indirect" field in DIVariable; but moving
that into the expression would be a natural next step.
http://reviews.llvm.org/D4919
rdar://problem/17994491
Thanks to dblaikie and dexonsmith for reviewing this patch!
Note: I accidentally committed a bogus older version of this patch previously.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218787 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-01 18:55:02 +00:00
|
|
|
tail call void @llvm.dbg.value(metadata !{i32 %cond}, i64 0, metadata !17, metadata !{i32 786690}), !dbg !25
|
2011-01-24 19:24:37 +00:00
|
|
|
%conv = sext i32 %cond to i64, !dbg !26
|
|
|
|
|
%conv5 = zext i32 %call to i64, !dbg !26
|
|
|
|
|
%call6 = tail call i64 @gcd(i64 %conv, i64 %conv5) optsize, !dbg !26
|
|
|
|
|
%cmp7 = icmp eq i64 %call6, 0
|
|
|
|
|
br i1 %cmp7, label %return, label %if.then, !dbg !26
|
|
|
|
|
|
|
|
|
|
if.then: ; preds = %cond.end
|
|
|
|
|
%puts = tail call i32 @puts(i8* getelementptr inbounds ([21 x i8]* @str, i64 0, i64 0))
|
|
|
|
|
%call12 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([14 x i8]* @.str1, i64 0, i64 0), i32 %call, i32 %cond) nounwind optsize, !dbg !26
|
|
|
|
|
ret i32 1, !dbg !27
|
|
|
|
|
|
|
|
|
|
return: ; preds = %cond.end
|
|
|
|
|
ret i32 0, !dbg !27
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
declare i32 @rand() optsize
|
|
|
|
|
|
|
|
|
|
declare i32 @printf(i8* nocapture, ...) nounwind optsize
|
|
|
|
|
|
Move the complex address expression out of DIVariable and into an extra
argument of the llvm.dbg.declare/llvm.dbg.value intrinsics.
Previously, DIVariable was a variable-length field that has an optional
reference to a Metadata array consisting of a variable number of
complex address expressions. In the case of OpPiece expressions this is
wasting a lot of storage in IR, because when an aggregate type is, e.g.,
SROA'd into all of its n individual members, the IR will contain n copies
of the DIVariable, all alike, only differing in the complex address
reference at the end.
By making the complex address into an extra argument of the
dbg.value/dbg.declare intrinsics, all of the pieces can reference the
same variable and the complex address expressions can be uniqued across
the CU, too.
Down the road, this will allow us to move other flags, such as
"indirection" out of the DIVariable, too.
The new intrinsics look like this:
declare void @llvm.dbg.declare(metadata %storage, metadata %var, metadata %expr)
declare void @llvm.dbg.value(metadata %storage, i64 %offset, metadata %var, metadata %expr)
This patch adds a new LLVM-local tag to DIExpressions, so we can detect
and pretty-print DIExpression metadata nodes.
What this patch doesn't do:
This patch does not touch the "Indirect" field in DIVariable; but moving
that into the expression would be a natural next step.
http://reviews.llvm.org/D4919
rdar://problem/17994491
Thanks to dblaikie and dexonsmith for reviewing this patch!
Note: I accidentally committed a bogus older version of this patch previously.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218787 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-01 18:55:02 +00:00
|
|
|
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
|
2011-01-24 19:24:37 +00:00
|
|
|
|
|
|
|
|
declare i32 @puts(i8* nocapture) nounwind
|
|
|
|
|
|
2013-03-08 00:23:31 +00:00
|
|
|
!llvm.dbg.cu = !{!2}
|
2013-11-22 21:49:45 +00:00
|
|
|
!llvm.module.flags = !{!33}
|
2011-01-24 19:24:37 +00:00
|
|
|
|
2013-09-06 21:03:58 +00:00
|
|
|
!0 = metadata !{i32 786478, metadata !31, metadata !1, metadata !"gcd", metadata !"gcd", metadata !"", i32 5, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i64 (i64, i64)* @gcd, null, null, metadata !29, i32 0} ; [ DW_TAG_subprogram ] [line 5] [def] [scope 0] [gcd]
|
2013-03-28 02:44:59 +00:00
|
|
|
!1 = metadata !{i32 786473, metadata !31} ; [ DW_TAG_file_type ]
|
2014-08-06 00:21:25 +00:00
|
|
|
!2 = metadata !{i32 786449, metadata !31, i32 12, metadata !"clang version 2.9 (trunk 124117)", i1 true, metadata !"", i32 0, metadata !32, metadata !32, metadata !28, null, null, null, i32 1} ; [ DW_TAG_compile_unit ]
|
2013-09-06 21:03:58 +00:00
|
|
|
!3 = metadata !{i32 786453, metadata !31, metadata !1, metadata !"", i32 0, i64 0, i64 0, i32 0, i32 0, null, metadata !4, i32 0, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ]
|
2011-01-24 19:24:37 +00:00
|
|
|
!4 = metadata !{metadata !5}
|
2013-03-28 02:44:59 +00:00
|
|
|
!5 = metadata !{i32 786468, null, metadata !2, metadata !"long int", i32 0, i64 64, i64 64, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ]
|
2013-09-06 21:03:58 +00:00
|
|
|
!6 = metadata !{i32 786478, metadata !31, metadata !1, metadata !"main", metadata !"main", metadata !"", i32 25, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 true, i32 ()* @main, null, null, metadata !30, i32 0} ; [ DW_TAG_subprogram ] [line 25] [def] [scope 0] [main]
|
|
|
|
|
!7 = metadata !{i32 786453, metadata !31, metadata !1, metadata !"", i32 0, i64 0, i64 0, i32 0, i32 0, null, metadata !8, i32 0, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ]
|
2011-01-24 19:24:37 +00:00
|
|
|
!8 = metadata !{metadata !9}
|
2013-03-28 02:44:59 +00:00
|
|
|
!9 = metadata !{i32 786468, null, metadata !2, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ]
|
2013-03-08 00:23:31 +00:00
|
|
|
!10 = metadata !{i32 786689, metadata !0, metadata !"a", metadata !1, i32 5, metadata !5, i32 0, null} ; [ DW_TAG_arg_variable ]
|
|
|
|
|
!11 = metadata !{i32 786689, metadata !0, metadata !"b", metadata !1, i32 5, metadata !5, i32 0, null} ; [ DW_TAG_arg_variable ]
|
|
|
|
|
!12 = metadata !{i32 786688, metadata !13, metadata !"c", metadata !1, i32 6, metadata !5, i32 0, null} ; [ DW_TAG_auto_variable ]
|
2013-07-29 18:12:58 +00:00
|
|
|
!13 = metadata !{i32 786443, metadata !31, metadata !0, i32 5, i32 52, i32 0} ; [ DW_TAG_lexical_block ]
|
2013-03-08 00:23:31 +00:00
|
|
|
!14 = metadata !{i32 786688, metadata !15, metadata !"m", metadata !1, i32 26, metadata !16, i32 0, null} ; [ DW_TAG_auto_variable ]
|
2013-07-29 18:12:58 +00:00
|
|
|
!15 = metadata !{i32 786443, metadata !31, metadata !6, i32 25, i32 12, i32 2} ; [ DW_TAG_lexical_block ]
|
2013-03-28 02:44:59 +00:00
|
|
|
!16 = metadata !{i32 786468, null, metadata !2, metadata !"unsigned int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ]
|
2013-03-08 00:23:31 +00:00
|
|
|
!17 = metadata !{i32 786688, metadata !15, metadata !"z_s", metadata !1, i32 27, metadata !9, i32 0, null} ; [ DW_TAG_auto_variable ]
|
2011-01-24 19:24:37 +00:00
|
|
|
!18 = metadata !{i32 5, i32 41, metadata !0, null}
|
|
|
|
|
!19 = metadata !{i32 5, i32 49, metadata !0, null}
|
|
|
|
|
!20 = metadata !{i32 7, i32 5, metadata !13, null}
|
|
|
|
|
!21 = metadata !{i32 8, i32 9, metadata !22, null}
|
2013-07-29 18:12:58 +00:00
|
|
|
!22 = metadata !{i32 786443, metadata !31, metadata !13, i32 7, i32 14, i32 1} ; [ DW_TAG_lexical_block ]
|
2011-01-24 19:24:37 +00:00
|
|
|
!23 = metadata !{i32 9, i32 9, metadata !22, null}
|
|
|
|
|
!24 = metadata !{i32 26, i32 38, metadata !15, null}
|
|
|
|
|
!25 = metadata !{i32 27, i32 38, metadata !15, null}
|
|
|
|
|
!26 = metadata !{i32 28, i32 9, metadata !15, null}
|
|
|
|
|
!27 = metadata !{i32 30, i32 1, metadata !15, null}
|
2013-03-17 21:13:55 +00:00
|
|
|
!28 = metadata !{metadata !0, metadata !6}
|
|
|
|
|
!29 = metadata !{metadata !10, metadata !11, metadata !12}
|
|
|
|
|
!30 = metadata !{metadata !14, metadata !17}
|
|
|
|
|
!31 = metadata !{metadata !"rem_small.c", metadata !"/private/tmp"}
|
2013-07-29 18:12:58 +00:00
|
|
|
!32 = metadata !{i32 0}
|
2013-11-22 21:49:45 +00:00
|
|
|
!33 = metadata !{i32 1, metadata !"Debug Info Version", i32 1}
|
