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llvm-6502/test/CodeGen/Mips/2009-11-16-CstPoolLoad.ll

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Fix LowerConstantPool to produce instructions with the correct relocation types for N32 ABI and update test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154034 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 18:26:12 +00:00
; RUN: llc -march=mipsel -relocation-model=pic < %s | FileCheck %s -check-prefix=PIC-O32
; RUN: llc -march=mipsel -relocation-model=static < %s | FileCheck %s -check-prefix=STATIC-O32
Move the Mips target to storing the ABI in the TargetMachine rather than on MipsSubtargetInfo. This required a bit of massaging in the MC level to handle this since MC is a) largely a collection of disparate classes with no hierarchy, and b) there's no overarching equivalent to the TargetMachine, instead only the subtarget via MCSubtargetInfo (which is the base class of TargetSubtargetInfo). We're now storing the ABI in both the TargetMachine level and in the MC level because the AsmParser and the TargetStreamer both need to know what ABI we have to parse assembly and emit objects. The target streamer has a pointer to the one in the asm parser and is updated when the asm parser is created. This is fragile as the FIXME comment notes, but shouldn't be a problem in practice since we always create an asm parser before attempting to emit object code via the assembler. The TargetMachine now contains the ABI so that the DataLayout can be constructed dependent upon ABI. All testcases have been updated to use the -target-abi command line flag so that we can set the ABI without using a subtarget feature. Should be no change visible externally here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227102 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 17:33:46 +00:00
; RUN: llc -march=mips64el -mcpu=mips64r2 -target-abi n32 -relocation-model=pic < %s | FileCheck %s -check-prefix=PIC-N32
; RUN: llc -march=mips64el -mcpu=mips64r2 -target-abi n32 -relocation-model=static < %s | FileCheck %s -check-prefix=STATIC-N32
; RUN: llc -march=mips64el -mcpu=mips64r2 -target-abi n64 -relocation-model=pic < %s | FileCheck %s -check-prefix=PIC-N64
; RUN: llc -march=mips64el -mcpu=mips64r2 -target-abi n64 -relocation-model=static < %s | FileCheck %s -check-prefix=STATIC-N64
- Fix a small bug while handling target constant pools (one param was missing). - Add a smarter constant pool loading, instead of: lui $2, %hi($CPI1_0) addiu $2, $2, %lo($CPI1_0) lwc1 $f0, 0($2) Generate: lui $2, %hi($CPI1_0) lwc1 $f0, %lo($CPI1_0)($2) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88886 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 04:33:42 +00:00
define float @h() nounwind readnone {
entry:
Fix LowerConstantPool to produce instructions with the correct relocation types for N32 ABI and update test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154034 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 18:26:12 +00:00
; PIC-O32: lw $[[R0:[0-9]+]], %got($CPI0_0)
; PIC-O32: lwc1 $f0, %lo($CPI0_0)($[[R0]])
; STATIC-O32: lui $[[R0:[0-9]+]], %hi($CPI0_0)
; STATIC-O32: lwc1 $f0, %lo($CPI0_0)($[[R0]])
; PIC-N32: lw $[[R0:[0-9]+]], %got_page($CPI0_0)
; PIC-N32: lwc1 $f0, %got_ofst($CPI0_0)($[[R0]])
; STATIC-N32: lui $[[R0:[0-9]+]], %hi($CPI0_0)
; STATIC-N32: lwc1 $f0, %lo($CPI0_0)($[[R0]])
; PIC-N64: ld $[[R0:[0-9]+]], %got_page($CPI0_0)
; PIC-N64: lwc1 $f0, %got_ofst($CPI0_0)($[[R0]])
; STATIC-N64: ld $[[R0:[0-9]+]], %got_page($CPI0_0)
; STATIC-N64: lwc1 $f0, %got_ofst($CPI0_0)($[[R0]])
- Fix a small bug while handling target constant pools (one param was missing). - Add a smarter constant pool loading, instead of: lui $2, %hi($CPI1_0) addiu $2, $2, %lo($CPI1_0) lwc1 $f0, 0($2) Generate: lui $2, %hi($CPI1_0) lwc1 $f0, %lo($CPI1_0)($2) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88886 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 04:33:42 +00:00
ret float 0x400B333340000000
}
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