2014-10-17 01:41:22 +00:00
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; RUN: llc -mcpu=pwr7 -O1 -code-model=medium -mattr=-vsx < %s | FileCheck %s
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; RUN: llc -mcpu=pwr7 -O1 -code-model=medium -mattr=+vsx < %s | FileCheck -check-prefix=CHECK-VSX %s
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PPCDAGToDAGISel::PostprocessISelDAG()
This patch implements the PPCDAGToDAGISel::PostprocessISelDAG virtual
method to perform post-selection peephole optimizations on the DAG
representation.
One optimization is implemented here: folds to clean up complex
addressing expressions for thread-local storage and medium code
model. It will also be useful for large code model sequences when
those are added later. I originally thought about doing this on the
MI representation prior to register assignment, but it's difficult to
do effective global dead code elimination at that point. DCE is
trivial on the DAG representation.
A typical example of a candidate code sequence in assembly:
addis 3, 2, globalvar@toc@ha
addi 3, 3, globalvar@toc@l
lwz 5, 0(3)
When the final instruction is a load or store with an immediate offset
of zero, the offset from the add-immediate can replace the zero,
provided the relocation information is carried along:
addis 3, 2, globalvar@toc@ha
lwz 5, globalvar@toc@l(3)
Since the addi can in general have multiple uses, we need to only
delete the instruction when the last use is removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175697 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 00:38:25 +00:00
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; Test peephole optimization for medium code model (32-bit TOC offsets)
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; for loading a value from the constant pool (TOC-relative).
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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define double @test_double_const() nounwind {
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entry:
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ret double 0x3F4FD4920B498CF0
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}
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; CHECK: [[VAR:[a-z0-9A-Z_.]+]]:
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; CHECK: .quad 4562098671269285104
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2013-07-13 20:38:47 +00:00
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; CHECK-LABEL: test_double_const:
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PPCDAGToDAGISel::PostprocessISelDAG()
This patch implements the PPCDAGToDAGISel::PostprocessISelDAG virtual
method to perform post-selection peephole optimizations on the DAG
representation.
One optimization is implemented here: folds to clean up complex
addressing expressions for thread-local storage and medium code
model. It will also be useful for large code model sequences when
those are added later. I originally thought about doing this on the
MI representation prior to register assignment, but it's difficult to
do effective global dead code elimination at that point. DCE is
trivial on the DAG representation.
A typical example of a candidate code sequence in assembly:
addis 3, 2, globalvar@toc@ha
addi 3, 3, globalvar@toc@l
lwz 5, 0(3)
When the final instruction is a load or store with an immediate offset
of zero, the offset from the add-immediate can replace the zero,
provided the relocation information is carried along:
addis 3, 2, globalvar@toc@ha
lwz 5, globalvar@toc@l(3)
Since the addi can in general have multiple uses, we need to only
delete the instruction when the last use is removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175697 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 00:38:25 +00:00
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; CHECK: addis [[REG1:[0-9]+]], 2, [[VAR]]@toc@ha
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; CHECK: lfd {{[0-9]+}}, [[VAR]]@toc@l([[REG1]])
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2014-10-17 01:41:22 +00:00
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; CHECK-VSX: [[VAR:[a-z0-9A-Z_.]+]]:
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; CHECK-VSX: .quad 4562098671269285104
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; CHECK-VSX-LABEL: test_double_const:
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; CHECK-VSX: addis [[REG1:[0-9]+]], 2, [[VAR]]@toc@ha
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; CHECK-VSX: addi [[REG1]], {{[0-9]+}}, [[VAR]]@toc@l
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; CHECK-VSX: lxsdx {{[0-9]+}}, 0, [[REG1]]
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