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https://github.com/c64scene-ar/llvm-6502.git
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72 lines
2.5 KiB
LLVM
72 lines
2.5 KiB
LLVM
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; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx -o %t -f
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; RUN: grep psllq %t | count 1
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; RUN: grep pslld %t | count 3
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; RUN: grep psllw %t | count 2
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; test vector shifts converted to proper SSE2 vector shifts when the shift
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; amounts are the same when using a shuffle splat.
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define void @shift1a(<2 x i64> %val, <2 x i64>* %dst, <2 x i64> %sh) nounwind {
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entry:
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%shamt = shufflevector <2 x i64> %sh, <2 x i64> undef, <2 x i32> <i32 0, i32 0>
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%shl = shl <2 x i64> %val, %shamt
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store <2 x i64> %shl, <2 x i64>* %dst
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ret void
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}
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define void @shift1b(<2 x i64> %val, <2 x i64>* %dst, <2 x i64> %sh) nounwind {
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entry:
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%shamt = shufflevector <2 x i64> %sh, <2 x i64> undef, <2 x i32> <i32 0, i32 1>
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%shl = shl <2 x i64> %val, %shamt
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store <2 x i64> %shl, <2 x i64>* %dst
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ret void
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}
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define void @shift2a(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind {
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entry:
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%shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
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%shl = shl <4 x i32> %val, %shamt
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store <4 x i32> %shl, <4 x i32>* %dst
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ret void
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}
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define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind {
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entry:
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%shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 1, i32 1>
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%shl = shl <4 x i32> %val, %shamt
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store <4 x i32> %shl, <4 x i32>* %dst
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ret void
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}
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define void @shift2c(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind {
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entry:
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%shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
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%shl = shl <4 x i32> %val, %shamt
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store <4 x i32> %shl, <4 x i32>* %dst
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ret void
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}
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define void @shift3a(<8 x i16> %val, <8 x i16>* %dst, <8 x i16> %amt) nounwind {
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entry:
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%shamt = shufflevector <8 x i16> %amt, <8 x i16> undef, <8 x i32> <i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6>
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%shl = shl <8 x i16> %val, %shamt
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store <8 x i16> %shl, <8 x i16>* %dst
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ret void
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}
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define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind {
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entry:
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%0 = insertelement <8 x i16> undef, i16 %amt, i32 0
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%1 = insertelement <8 x i16> %0, i16 %amt, i32 1
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%2 = insertelement <8 x i16> %0, i16 %amt, i32 2
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%3 = insertelement <8 x i16> %0, i16 %amt, i32 3
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%4 = insertelement <8 x i16> %0, i16 %amt, i32 4
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%5 = insertelement <8 x i16> %0, i16 %amt, i32 5
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%6 = insertelement <8 x i16> %0, i16 %amt, i32 6
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%7 = insertelement <8 x i16> %0, i16 %amt, i32 7
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%shl = shl <8 x i16> %val, %7
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store <8 x i16> %shl, <8 x i16>* %dst
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ret void
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}
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