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llvm-6502/test/CodeGen/AArch64/fcmp.ll

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AArch64/ARM64: move ARM64 into AArch64's place This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209577 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-24 12:50:23 +00:00
; RUN: llc -verify-machineinstrs -o - %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
Add AArch64 as an experimental target. This patch adds support for AArch64 (ARM's 64-bit architecture) to LLVM in the "experimental" category. Currently, it won't be built unless requested explicitly. This initial commit should have support for: + Assembly of all scalar (i.e. non-NEON, non-Crypto) instructions (except the late addition CRC instructions). + CodeGen features required for C++03 and C99. + Compilation for the "small" memory model: code+static data < 4GB. + Absolute and position-independent code. + GNU-style (i.e. "__thread") TLS. + Debugging information. The principal omission, currently, is performance tuning. This patch excludes the NEON support also reviewed due to an outbreak of batshit insanity in our legal department. That will be committed soon bringing the changes to precisely what has been approved. Further reviews would be gratefully received. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174054 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31 12:12:40 +00:00
declare void @bar(i32)
define void @test_float(float %a, float %b) {
Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion. This was done with the following sed invocation to catch label lines demarking function boundaries: sed -i '' "s/^;\( *\)\([A-Z0-9_]*\):\( *\)test\([A-Za-z0-9_-]*\):\( *\)$/;\1\2-LABEL:\3test\4:\5/g" test/CodeGen/*/*.ll which was written conservatively to avoid false positives rather than false negatives. I scanned through all the changes and everything looks correct. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186258 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-13 20:38:47 +00:00
; CHECK-LABEL: test_float:
Add AArch64 as an experimental target. This patch adds support for AArch64 (ARM's 64-bit architecture) to LLVM in the "experimental" category. Currently, it won't be built unless requested explicitly. This initial commit should have support for: + Assembly of all scalar (i.e. non-NEON, non-Crypto) instructions (except the late addition CRC instructions). + CodeGen features required for C++03 and C99. + Compilation for the "small" memory model: code+static data < 4GB. + Absolute and position-independent code. + GNU-style (i.e. "__thread") TLS. + Debugging information. The principal omission, currently, is performance tuning. This patch excludes the NEON support also reviewed due to an outbreak of batshit insanity in our legal department. That will be committed soon bringing the changes to precisely what has been approved. Further reviews would be gratefully received. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174054 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31 12:12:40 +00:00
%tst1 = fcmp oeq float %a, %b
br i1 %tst1, label %end, label %t2
; CHECK: fcmp {{s[0-9]+}}, {{s[0-9]+}}
; CHECK: b.eq .L
t2:
%tst2 = fcmp une float %b, 0.0
br i1 %tst2, label %t3, label %end
; CHECK: fcmp {{s[0-9]+}}, #0.0
; CHECK: b.eq .L
t3:
; This test can't be implemented with just one A64 conditional
; branch. LLVM converts "ordered and not equal" to "unordered or
; equal" before instruction selection, which is what we currently
; test. Obviously, other sequences are valid.
%tst3 = fcmp one float %a, %b
br i1 %tst3, label %t4, label %end
; CHECK: fcmp {{s[0-9]+}}, {{s[0-9]+}}
; CHECK-NEXT: b.eq .[[T4:LBB[0-9]+_[0-9]+]]
; CHECK-NEXT: b.vs .[[T4]]
t4:
%tst4 = fcmp uge float %a, -0.0
br i1 %tst4, label %t5, label %end
; CHECK-NOT: fcmp {{s[0-9]+}}, #0.0
; CHECK: b.mi .LBB
t5:
call void @bar(i32 0)
ret void
end:
ret void
}
define void @test_double(double %a, double %b) {
Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion. This was done with the following sed invocation to catch label lines demarking function boundaries: sed -i '' "s/^;\( *\)\([A-Z0-9_]*\):\( *\)test\([A-Za-z0-9_-]*\):\( *\)$/;\1\2-LABEL:\3test\4:\5/g" test/CodeGen/*/*.ll which was written conservatively to avoid false positives rather than false negatives. I scanned through all the changes and everything looks correct. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186258 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-13 20:38:47 +00:00
; CHECK-LABEL: test_double:
Add AArch64 as an experimental target. This patch adds support for AArch64 (ARM's 64-bit architecture) to LLVM in the "experimental" category. Currently, it won't be built unless requested explicitly. This initial commit should have support for: + Assembly of all scalar (i.e. non-NEON, non-Crypto) instructions (except the late addition CRC instructions). + CodeGen features required for C++03 and C99. + Compilation for the "small" memory model: code+static data < 4GB. + Absolute and position-independent code. + GNU-style (i.e. "__thread") TLS. + Debugging information. The principal omission, currently, is performance tuning. This patch excludes the NEON support also reviewed due to an outbreak of batshit insanity in our legal department. That will be committed soon bringing the changes to precisely what has been approved. Further reviews would be gratefully received. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174054 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-31 12:12:40 +00:00
%tst1 = fcmp oeq double %a, %b
br i1 %tst1, label %end, label %t2
; CHECK: fcmp {{d[0-9]+}}, {{d[0-9]+}}
; CHECK: b.eq .L
t2:
%tst2 = fcmp une double %b, 0.0
br i1 %tst2, label %t3, label %end
; CHECK: fcmp {{d[0-9]+}}, #0.0
; CHECK: b.eq .L
t3:
; This test can't be implemented with just one A64 conditional
; branch. LLVM converts "ordered and not equal" to "unordered or
; equal" before instruction selection, which is what we currently
; test. Obviously, other sequences are valid.
%tst3 = fcmp one double %a, %b
br i1 %tst3, label %t4, label %end
; CHECK: fcmp {{d[0-9]+}}, {{d[0-9]+}}
; CHECK-NEXT: b.eq .[[T4:LBB[0-9]+_[0-9]+]]
; CHECK-NEXT: b.vs .[[T4]]
t4:
%tst4 = fcmp uge double %a, -0.0
br i1 %tst4, label %t5, label %end
; CHECK-NOT: fcmp {{d[0-9]+}}, #0.0
; CHECK: b.mi .LBB
t5:
call void @bar(i32 0)
ret void
end:
ret void
}
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