2011-12-12 21:14:40 +00:00
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//=- HexagonIntrinsicsV3.td - Target Description for Hexagon -*- tablegen -*-=//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file describes the Hexagon V3 Compiler Intrinsics in TableGen format.
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//
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//===----------------------------------------------------------------------===//
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2015-02-03 20:40:52 +00:00
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// Vector reduce complex multiply real or imaginary
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def : T_PR_pat <M2_vrcmpys_s1, int_hexagon_M2_vrcmpys_s1>;
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def : T_PPR_pat<M2_vrcmpys_acc_s1, int_hexagon_M2_vrcmpys_acc_s1>;
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def : T_PR_pat <M2_vrcmpys_s1rp, int_hexagon_M2_vrcmpys_s1rp>;
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2011-12-12 21:14:40 +00:00
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2015-02-03 20:40:52 +00:00
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// Vector reduce add unsigned halfwords
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def : T_PP_pat<M2_vradduh, int_hexagon_M2_vradduh>;
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2011-12-12 21:14:40 +00:00
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2015-01-28 22:08:16 +00:00
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def: T_RP_pat<A2_addsp, int_hexagon_A2_addsp>;
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def: T_PP_pat<A2_addpsat, int_hexagon_A2_addpsat>;
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def: T_PP_pat<A2_minp, int_hexagon_A2_minp>;
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def: T_PP_pat<A2_minup, int_hexagon_A2_minup>;
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def: T_PP_pat<A2_maxp, int_hexagon_A2_maxp>;
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def: T_PP_pat<A2_maxup, int_hexagon_A2_maxup>;
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