2006-09-04 04:14:57 +00:00
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//===-- PPC.h - Top-level interface for PowerPC Target ----------*- C++ -*-===//
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2005-04-21 23:30:14 +00:00
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//
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2004-06-21 16:55:25 +00:00
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// The LLVM Compiler Infrastructure
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//
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2007-12-29 20:36:04 +00:00
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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2005-04-21 23:30:14 +00:00
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//
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2004-06-21 16:55:25 +00:00
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//===----------------------------------------------------------------------===//
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//
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// This file contains the entry points for global functions defined in the LLVM
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// PowerPC back-end.
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//
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//===----------------------------------------------------------------------===//
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2006-09-04 04:14:57 +00:00
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#ifndef LLVM_TARGET_POWERPC_H
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#define LLVM_TARGET_POWERPC_H
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2004-06-21 16:55:25 +00:00
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2011-07-14 20:59:42 +00:00
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#include "MCTargetDesc/PPCMCTargetDesc.h"
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2010-11-15 08:49:58 +00:00
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#include <string>
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2006-11-04 05:27:39 +00:00
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// GCC #defines PPC on Linux but we use it as our namespace name
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#undef PPC
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2006-08-23 21:08:52 +00:00
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2006-11-04 05:27:39 +00:00
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namespace llvm {
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class PPCTargetMachine;
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class FunctionPass;
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2009-07-14 20:18:05 +00:00
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class formatted_raw_ostream;
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2010-11-14 21:09:28 +00:00
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class JITCodeEmitter;
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class Target;
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2010-11-14 21:12:33 +00:00
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class MachineInstr;
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class AsmPrinter;
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Implement a basic MCCodeEmitter for PPC. This doesn't handle
fixups yet, and doesn't handle actually encoding operand values,
but this is enough for llc -show-mc-encoding to show the base
instruction encoding information, e.g.:
mflr r0 ; encoding: [0x7c,0x08,0x02,0xa6]
stw r0, 8(r1) ; encoding: [0x90,0x00,0x00,0x00]
stwu r1, -64(r1) ; encoding: [0x94,0x00,0x00,0x00]
Ltmp0:
lhz r4, 4(r3) ; encoding: [0xa0,0x00,0x00,0x00]
cmplwi cr0, r4, 8 ; encoding: [0x28,0x00,0x00,0x00]
beq cr0, LBB0_2 ; encoding: [0x40,0x00,0x00,0x00]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119116 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 04:16:32 +00:00
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class MCInst;
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class MCCodeEmitter;
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class MCContext;
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2011-07-11 03:57:24 +00:00
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class MCInstrInfo;
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class MCSubtargetInfo;
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Implement a basic MCCodeEmitter for PPC. This doesn't handle
fixups yet, and doesn't handle actually encoding operand values,
but this is enough for llc -show-mc-encoding to show the base
instruction encoding information, e.g.:
mflr r0 ; encoding: [0x7c,0x08,0x02,0xa6]
stw r0, 8(r1) ; encoding: [0x90,0x00,0x00,0x00]
stwu r1, -64(r1) ; encoding: [0x94,0x00,0x00,0x00]
Ltmp0:
lhz r4, 4(r3) ; encoding: [0xa0,0x00,0x00,0x00]
cmplwi cr0, r4, 8 ; encoding: [0x28,0x00,0x00,0x00]
beq cr0, LBB0_2 ; encoding: [0x40,0x00,0x00,0x00]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119116 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 04:16:32 +00:00
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class TargetMachine;
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2010-11-15 08:49:58 +00:00
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class TargetAsmBackend;
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2006-11-04 05:27:39 +00:00
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2010-11-15 03:13:19 +00:00
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FunctionPass *createPPCBranchSelectionPass();
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FunctionPass *createPPCISelDag(PPCTargetMachine &TM);
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FunctionPass *createPPCJITCodeEmitterPass(PPCTargetMachine &TM,
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JITCodeEmitter &MCE);
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2011-07-11 03:57:24 +00:00
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MCCodeEmitter *createPPCMCCodeEmitter(const MCInstrInfo &MCII,
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const MCSubtargetInfo &STI,
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Implement a basic MCCodeEmitter for PPC. This doesn't handle
fixups yet, and doesn't handle actually encoding operand values,
but this is enough for llc -show-mc-encoding to show the base
instruction encoding information, e.g.:
mflr r0 ; encoding: [0x7c,0x08,0x02,0xa6]
stw r0, 8(r1) ; encoding: [0x90,0x00,0x00,0x00]
stwu r1, -64(r1) ; encoding: [0x94,0x00,0x00,0x00]
Ltmp0:
lhz r4, 4(r3) ; encoding: [0xa0,0x00,0x00,0x00]
cmplwi cr0, r4, 8 ; encoding: [0x28,0x00,0x00,0x00]
beq cr0, LBB0_2 ; encoding: [0x40,0x00,0x00,0x00]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119116 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 04:16:32 +00:00
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MCContext &Ctx);
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2010-11-15 08:49:58 +00:00
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TargetAsmBackend *createPPCAsmBackend(const Target &, const std::string &);
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2010-11-15 03:13:19 +00:00
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void LowerPPCMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
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2011-06-09 20:25:38 +00:00
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AsmPrinter &AP, bool isDarwin);
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2010-11-15 03:13:19 +00:00
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2010-11-14 23:42:06 +00:00
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namespace PPCII {
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/// Target Operand Flag enum.
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enum TOF {
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//===------------------------------------------------------------------===//
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// PPC Specific MachineOperand flags.
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MO_NO_FLAG,
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/// MO_DARWIN_STUB - On a symbol operand "FOO", this indicates that the
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/// reference is actually to the "FOO$stub" symbol. This is used for calls
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/// and jumps to external functions on Tiger and earlier.
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2010-11-15 03:13:19 +00:00
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MO_DARWIN_STUB = 1,
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2010-11-14 23:42:06 +00:00
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2010-11-15 03:13:19 +00:00
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/// MO_LO16, MO_HA16 - lo16(symbol) and ha16(symbol)
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MO_LO16 = 4, MO_HA16 = 8,
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/// MO_PIC_FLAG - If this bit is set, the symbol reference is relative to
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/// the function's picbase, e.g. lo16(symbol-picbase).
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MO_PIC_FLAG = 16,
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2010-11-15 02:46:57 +00:00
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2010-11-15 03:13:19 +00:00
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/// MO_NLP_FLAG - If this bit is set, the symbol reference is actually to
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/// the non_lazy_ptr for the global, e.g. lo16(symbol$non_lazy_ptr-picbase).
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MO_NLP_FLAG = 32,
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2010-11-15 02:46:57 +00:00
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2010-11-15 03:13:19 +00:00
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/// MO_NLP_HIDDEN_FLAG - If this bit is set, the symbol reference is to a
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/// symbol with hidden visibility. This causes a different kind of
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/// non-lazy-pointer to be generated.
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MO_NLP_HIDDEN_FLAG = 64
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2010-11-14 23:42:06 +00:00
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};
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} // end namespace PPCII
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2004-06-21 16:55:25 +00:00
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} // end namespace llvm;
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#endif
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