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llvm-6502/lib/Target/IA64/Makefile

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and so it begins... PHASE 1: write instruction selector PHASE 2: ??? PHASE 3: profit! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20652 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-17 18:17:03 +00:00
##===- lib/Target/IA64/Makefile -----------------------------*- Makefile -*-===##
# The LLVM Compiler Infrastructure
#
remove attribution from lib Makefiles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45415 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-29 20:09:26 +00:00
# This file is distributed under the University of Illinois Open Source
# License. See LICENSE.TXT for details.
Removed trailing whitespace from Makefiles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61991 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-09 16:44:42 +00:00
#
and so it begins... PHASE 1: write instruction selector PHASE 2: ??? PHASE 3: profit! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20652 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-17 18:17:03 +00:00
##===----------------------------------------------------------------------===##
LEVEL = ../../..
Move IA64 asmprinter to separate library git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68380 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-03 10:38:51 +00:00
LIBRARYNAME = LLVMIA64CodeGen
and so it begins... PHASE 1: write instruction selector PHASE 2: ??? PHASE 3: profit! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20652 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-17 18:17:03 +00:00
TARGET = IA64
# Make sure that tblgen is run, first thing.
BUILT_SOURCES = IA64GenRegisterInfo.h.inc IA64GenRegisterNames.inc \
IA64GenRegisterInfo.inc IA64GenInstrNames.inc \
DAG->DAG instruction selection for ia64! "hello world" works, not much else. use -enable-ia64-dag-isel to turn this on TODO: delete lowering stuff from the pattern isel : get operations on predicate bits working : get other bits of pseudocode going : use sampo's mulh/mull-using divide-by-constant magic : *so* many patterns ("extr", "tbit" and "dep" will be fun :) : add FP : add a JIT! : get it working 100% in short: this'll be happier in a couple of weeks, but it's here now so the tester can make me feel guilty sooner. OTHER: there are a couple of fixes to the pattern isel, in particular making the linker happy with big blobs of fun like pypy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24058 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-28 17:46:35 +00:00
IA64GenInstrInfo.inc IA64GenAsmWriter.inc \
IA64GenDAGISel.inc
and so it begins... PHASE 1: write instruction selector PHASE 2: ??? PHASE 3: profit! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20652 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-17 18:17:03 +00:00
Move IA64 asmprinter to separate library git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68380 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-03 10:38:51 +00:00
DIRS = AsmPrinter
and so it begins... PHASE 1: write instruction selector PHASE 2: ??? PHASE 3: profit! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20652 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-17 18:17:03 +00:00
include $(LEVEL)/Makefile.common
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