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llvm-6502/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll

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Fix register-dependent X86 tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128867 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05 00:32:44 +00:00
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx | FileCheck %s
; CHECK: movd %rsi, [[MM0:%mm[0-9]+]]
; CHECK: movd %rdi, [[MM1:%mm[0-9]+]]
; CHECK: paddusw [[MM0]], [[MM1]]
Allow a GR64 to be moved into an MMX register via the "movd" instruction. Still need to have JIT generate this code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37863 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-04 00:19:54 +00:00
Massive rewrite of MMX: The x86_mmx type is used for MMX intrinsics, parameters and return values where these use MMX registers, and is also supported in load, store, and bitcast. Only the above operations generate MMX instructions, and optimizations do not operate on or produce MMX intrinsics. MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into smaller pieces. Optimizations may occur on these forms and the result casted back to x86_mmx, provided the result feeds into a previous existing x86_mmx operation. The point of all this is prevent optimizations from introducing MMX operations, which is unsafe due to the EMMS problem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115243 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-30 23:57:10 +00:00
@R = external global x86_mmx ; <x86_mmx*> [#uses=1]
Allow a GR64 to be moved into an MMX register via the "movd" instruction. Still need to have JIT generate this code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37863 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-04 00:19:54 +00:00
no need for eh info git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50658 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-05 18:24:33 +00:00
define void @foo(<1 x i64> %A, <1 x i64> %B) nounwind {
Allow a GR64 to be moved into an MMX register via the "movd" instruction. Still need to have JIT generate this code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37863 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-04 00:19:54 +00:00
entry:
Massive rewrite of MMX: The x86_mmx type is used for MMX intrinsics, parameters and return values where these use MMX registers, and is also supported in load, store, and bitcast. Only the above operations generate MMX instructions, and optimizations do not operate on or produce MMX intrinsics. MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into smaller pieces. Optimizations may occur on these forms and the result casted back to x86_mmx, provided the result feeds into a previous existing x86_mmx operation. The point of all this is prevent optimizations from introducing MMX operations, which is unsafe due to the EMMS problem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115243 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-30 23:57:10 +00:00
%tmp4 = bitcast <1 x i64> %B to x86_mmx ; <<4 x i16>> [#uses=1]
%tmp6 = bitcast <1 x i64> %A to x86_mmx ; <<4 x i16>> [#uses=1]
%tmp7 = tail call x86_mmx @llvm.x86.mmx.paddus.w( x86_mmx %tmp6, x86_mmx %tmp4 ) ; <x86_mmx> [#uses=1]
store x86_mmx %tmp7, x86_mmx* @R
Allow a GR64 to be moved into an MMX register via the "movd" instruction. Still need to have JIT generate this code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37863 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-04 00:19:54 +00:00
tail call void @llvm.x86.mmx.emms( )
ret void
}
Massive rewrite of MMX: The x86_mmx type is used for MMX intrinsics, parameters and return values where these use MMX registers, and is also supported in load, store, and bitcast. Only the above operations generate MMX instructions, and optimizations do not operate on or produce MMX intrinsics. MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into smaller pieces. Optimizations may occur on these forms and the result casted back to x86_mmx, provided the result feeds into a previous existing x86_mmx operation. The point of all this is prevent optimizations from introducing MMX operations, which is unsafe due to the EMMS problem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115243 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-30 23:57:10 +00:00
declare x86_mmx @llvm.x86.mmx.paddus.w(x86_mmx, x86_mmx)
Allow a GR64 to be moved into an MMX register via the "movd" instruction. Still need to have JIT generate this code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37863 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-04 00:19:54 +00:00
declare void @llvm.x86.mmx.emms()
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