2005-10-16 05:39:50 +00:00
|
|
|
//===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
|
2005-04-21 23:30:14 +00:00
|
|
|
//
|
2004-06-21 16:55:25 +00:00
|
|
|
// The LLVM Compiler Infrastructure
|
|
|
|
//
|
2007-12-29 20:36:04 +00:00
|
|
|
// This file is distributed under the University of Illinois Open Source
|
|
|
|
// License. See LICENSE.TXT for details.
|
2005-04-21 23:30:14 +00:00
|
|
|
//
|
2004-06-21 16:55:25 +00:00
|
|
|
//===----------------------------------------------------------------------===//
|
2005-04-21 23:30:14 +00:00
|
|
|
//
|
2005-08-15 23:47:04 +00:00
|
|
|
// Top-level implementation for the PowerPC target.
|
2004-06-21 16:55:25 +00:00
|
|
|
//
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
|
2005-10-14 23:51:18 +00:00
|
|
|
#include "PPC.h"
|
2006-09-07 23:39:26 +00:00
|
|
|
#include "PPCTargetAsmInfo.h"
|
2005-10-14 23:59:06 +00:00
|
|
|
#include "PPCTargetMachine.h"
|
2004-06-21 16:55:25 +00:00
|
|
|
#include "llvm/PassManager.h"
|
2008-07-31 18:13:12 +00:00
|
|
|
#include "llvm/Target/TargetOptions.h"
|
2009-07-25 06:49:55 +00:00
|
|
|
#include "llvm/Target/TargetRegistry.h"
|
2009-07-14 20:18:05 +00:00
|
|
|
#include "llvm/Support/FormattedStream.h"
|
2004-06-21 16:55:25 +00:00
|
|
|
using namespace llvm;
|
|
|
|
|
2009-08-12 07:22:17 +00:00
|
|
|
static const TargetAsmInfo *createTargetAsmInfo(const Target &T,
|
|
|
|
const StringRef &TT) {
|
|
|
|
Triple TheTriple(TT);
|
|
|
|
if (TheTriple.getOS() == Triple::Darwin)
|
2009-08-13 05:30:22 +00:00
|
|
|
return new PPCDarwinTargetAsmInfo(TheTriple);
|
|
|
|
return new PPCLinuxTargetAsmInfo(TheTriple);
|
2009-08-12 07:22:17 +00:00
|
|
|
|
|
|
|
}
|
|
|
|
|
2009-07-25 06:49:55 +00:00
|
|
|
extern "C" void LLVMInitializePowerPCTarget() {
|
|
|
|
// Register the targets
|
|
|
|
RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target);
|
|
|
|
RegisterTargetMachine<PPC64TargetMachine> B(ThePPC64Target);
|
2009-08-12 07:22:17 +00:00
|
|
|
|
|
|
|
RegisterAsmInfoFn C(ThePPC32Target, createTargetAsmInfo);
|
|
|
|
RegisterAsmInfoFn D(ThePPC64Target, createTargetAsmInfo);
|
2009-07-25 06:49:55 +00:00
|
|
|
}
|
2009-06-16 20:12:29 +00:00
|
|
|
|
2006-09-07 23:39:26 +00:00
|
|
|
|
2009-08-11 20:42:37 +00:00
|
|
|
PPCTargetMachine::PPCTargetMachine(const Target &T, const std::string &TT,
|
2009-07-15 20:24:03 +00:00
|
|
|
const std::string &FS, bool is64Bit)
|
2009-08-11 20:42:37 +00:00
|
|
|
: LLVMTargetMachine(T, TT),
|
2009-08-02 23:37:13 +00:00
|
|
|
Subtarget(TT, FS, is64Bit),
|
2006-06-17 00:01:04 +00:00
|
|
|
DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
|
2006-11-18 01:34:43 +00:00
|
|
|
FrameInfo(*this, is64Bit), JITInfo(*this, is64Bit), TLInfo(*this),
|
2007-01-24 03:41:36 +00:00
|
|
|
InstrItins(Subtarget.getInstrItineraryData()), MachOWriterInfo(*this) {
|
2006-06-16 01:37:27 +00:00
|
|
|
|
2008-02-20 11:22:39 +00:00
|
|
|
if (getRelocationModel() == Reloc::Default) {
|
2006-02-22 20:19:42 +00:00
|
|
|
if (Subtarget.isDarwin())
|
|
|
|
setRelocationModel(Reloc::DynamicNoPIC);
|
|
|
|
else
|
2006-12-21 20:26:09 +00:00
|
|
|
setRelocationModel(Reloc::Static);
|
2008-02-20 11:22:39 +00:00
|
|
|
}
|
2005-10-16 05:39:50 +00:00
|
|
|
}
|
|
|
|
|
2007-05-22 17:14:46 +00:00
|
|
|
/// Override this for PowerPC. Tail merging happily breaks up instruction issue
|
|
|
|
/// groups, which typically degrades performance.
|
2007-11-19 20:46:23 +00:00
|
|
|
bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; }
|
2007-05-22 17:14:46 +00:00
|
|
|
|
2009-08-02 23:37:13 +00:00
|
|
|
PPC32TargetMachine::PPC32TargetMachine(const Target &T, const std::string &TT,
|
2009-07-15 20:24:03 +00:00
|
|
|
const std::string &FS)
|
2009-08-02 23:37:13 +00:00
|
|
|
: PPCTargetMachine(T, TT, FS, false) {
|
2006-06-16 01:37:27 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2009-08-02 23:37:13 +00:00
|
|
|
PPC64TargetMachine::PPC64TargetMachine(const Target &T, const std::string &TT,
|
2009-07-15 20:24:03 +00:00
|
|
|
const std::string &FS)
|
2009-08-02 23:37:13 +00:00
|
|
|
: PPCTargetMachine(T, TT, FS, true) {
|
2006-06-16 01:37:27 +00:00
|
|
|
}
|
|
|
|
|
2004-08-11 07:40:04 +00:00
|
|
|
|
2006-09-04 04:14:57 +00:00
|
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
// Pass Pipeline Configuration
|
|
|
|
//===----------------------------------------------------------------------===//
|
2004-08-11 07:40:04 +00:00
|
|
|
|
2009-04-29 23:29:43 +00:00
|
|
|
bool PPCTargetMachine::addInstSelector(PassManagerBase &PM,
|
|
|
|
CodeGenOpt::Level OptLevel) {
|
2005-08-17 19:33:30 +00:00
|
|
|
// Install an instruction selector.
|
2006-01-12 01:46:07 +00:00
|
|
|
PM.add(createPPCISelDag(*this));
|
2006-09-04 04:14:57 +00:00
|
|
|
return false;
|
|
|
|
}
|
2004-08-11 07:40:04 +00:00
|
|
|
|
2009-04-29 23:29:43 +00:00
|
|
|
bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM,
|
|
|
|
CodeGenOpt::Level OptLevel) {
|
2006-09-04 04:14:57 +00:00
|
|
|
// Must run branch selection immediately preceding the asm printer.
|
2004-08-11 07:40:04 +00:00
|
|
|
PM.add(createPPCBranchSelectionPass());
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2009-04-29 23:29:43 +00:00
|
|
|
bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
|
|
|
|
CodeGenOpt::Level OptLevel,
|
2009-07-15 22:33:19 +00:00
|
|
|
MachineCodeEmitter &MCE) {
|
2006-12-08 04:54:03 +00:00
|
|
|
// The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
|
2006-09-04 04:14:57 +00:00
|
|
|
// FIXME: This should be moved to TargetJITInfo!!
|
2006-12-08 04:54:03 +00:00
|
|
|
if (Subtarget.isPPC64()) {
|
|
|
|
// We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
|
|
|
|
// instructions to materialize arbitrary global variable + function +
|
|
|
|
// constant pool addresses.
|
|
|
|
setRelocationModel(Reloc::PIC_);
|
2008-07-31 18:13:12 +00:00
|
|
|
// Temporary workaround for the inability of PPC64 JIT to handle jump
|
|
|
|
// tables.
|
|
|
|
DisableJumpTables = true;
|
2006-12-08 04:54:03 +00:00
|
|
|
} else {
|
|
|
|
setRelocationModel(Reloc::Static);
|
|
|
|
}
|
|
|
|
|
2006-12-11 23:22:45 +00:00
|
|
|
// Inform the subtarget that we are in JIT mode. FIXME: does this break macho
|
|
|
|
// writing?
|
|
|
|
Subtarget.SetJITMode();
|
2006-09-04 04:14:57 +00:00
|
|
|
|
|
|
|
// Machine code emitter pass for PowerPC.
|
2006-08-23 21:08:52 +00:00
|
|
|
PM.add(createPPCCodeEmitterPass(*this, MCE));
|
2008-08-17 13:54:28 +00:00
|
|
|
|
2006-08-23 21:08:52 +00:00
|
|
|
return false;
|
|
|
|
}
|
2006-09-04 04:14:57 +00:00
|
|
|
|
2009-05-30 20:51:52 +00:00
|
|
|
bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
|
|
|
|
CodeGenOpt::Level OptLevel,
|
2009-07-15 22:33:19 +00:00
|
|
|
JITCodeEmitter &JCE) {
|
2009-05-30 20:51:52 +00:00
|
|
|
// The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
|
|
|
|
// FIXME: This should be moved to TargetJITInfo!!
|
|
|
|
if (Subtarget.isPPC64()) {
|
|
|
|
// We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
|
|
|
|
// instructions to materialize arbitrary global variable + function +
|
|
|
|
// constant pool addresses.
|
|
|
|
setRelocationModel(Reloc::PIC_);
|
|
|
|
// Temporary workaround for the inability of PPC64 JIT to handle jump
|
|
|
|
// tables.
|
|
|
|
DisableJumpTables = true;
|
|
|
|
} else {
|
|
|
|
setRelocationModel(Reloc::Static);
|
|
|
|
}
|
|
|
|
|
|
|
|
// Inform the subtarget that we are in JIT mode. FIXME: does this break macho
|
|
|
|
// writing?
|
|
|
|
Subtarget.SetJITMode();
|
|
|
|
|
|
|
|
// Machine code emitter pass for PowerPC.
|
|
|
|
PM.add(createPPCJITCodeEmitterPass(*this, JCE));
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2009-07-06 05:09:34 +00:00
|
|
|
bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
|
|
|
|
CodeGenOpt::Level OptLevel,
|
2009-07-15 22:33:19 +00:00
|
|
|
ObjectCodeEmitter &OCE) {
|
2009-07-06 05:09:34 +00:00
|
|
|
// The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
|
|
|
|
// FIXME: This should be moved to TargetJITInfo!!
|
|
|
|
if (Subtarget.isPPC64()) {
|
|
|
|
// We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
|
|
|
|
// instructions to materialize arbitrary global variable + function +
|
|
|
|
// constant pool addresses.
|
|
|
|
setRelocationModel(Reloc::PIC_);
|
|
|
|
// Temporary workaround for the inability of PPC64 JIT to handle jump
|
|
|
|
// tables.
|
|
|
|
DisableJumpTables = true;
|
|
|
|
} else {
|
|
|
|
setRelocationModel(Reloc::Static);
|
|
|
|
}
|
|
|
|
|
|
|
|
// Inform the subtarget that we are in JIT mode. FIXME: does this break macho
|
|
|
|
// writing?
|
|
|
|
Subtarget.SetJITMode();
|
|
|
|
|
|
|
|
// Machine code emitter pass for PowerPC.
|
|
|
|
PM.add(createPPCObjectCodeEmitterPass(*this, OCE));
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2009-04-29 23:29:43 +00:00
|
|
|
bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
|
|
|
|
CodeGenOpt::Level OptLevel,
|
2009-06-01 19:57:37 +00:00
|
|
|
MachineCodeEmitter &MCE) {
|
2007-02-08 01:39:44 +00:00
|
|
|
// Machine code emitter pass for PowerPC.
|
|
|
|
PM.add(createPPCCodeEmitterPass(*this, MCE));
|
|
|
|
return false;
|
|
|
|
}
|
2009-05-30 20:51:52 +00:00
|
|
|
|
|
|
|
bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
|
|
|
|
CodeGenOpt::Level OptLevel,
|
2009-06-01 19:57:37 +00:00
|
|
|
JITCodeEmitter &JCE) {
|
2009-05-30 20:51:52 +00:00
|
|
|
// Machine code emitter pass for PowerPC.
|
|
|
|
PM.add(createPPCJITCodeEmitterPass(*this, JCE));
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2009-07-06 05:09:34 +00:00
|
|
|
bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
|
|
|
|
CodeGenOpt::Level OptLevel,
|
|
|
|
ObjectCodeEmitter &OCE) {
|
|
|
|
// Machine code emitter pass for PowerPC.
|
|
|
|
PM.add(createPPCObjectCodeEmitterPass(*this, OCE));
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
|