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llvm-6502/test/CodeGen/X86/test-shrink.ll

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Eliminate more uses of llvm-as and llvm-dis. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81290 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-08 23:54:48 +00:00
; RUN: llc < %s -march=x86-64 | FileCheck %s --check-prefix=CHECK-64
; RUN: llc < %s -march=x86 | FileCheck %s --check-prefix=CHECK-32
Add an x86 peep that narrows TEST instructions to forms that use a smaller encoding. These kinds of patterns are very frequent in sqlite3, for example. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79439 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-19 18:16:17 +00:00
; CHECK-64: g64xh:
; CHECK-64: testb $8, %ah
; CHECK-64: ret
; CHECK-32: g64xh:
; CHECK-32: testb $8, %ah
; CHECK-32: ret
define void @g64xh(i64 inreg %x) nounwind {
%t = and i64 %x, 2048
%s = icmp eq i64 %t, 0
br i1 %s, label %yes, label %no
yes:
call void @bar()
ret void
no:
ret void
}
; CHECK-64: g64xl:
; CHECK-64: testb $8, %dil
; CHECK-64: ret
; CHECK-32: g64xl:
; CHECK-32: testb $8, %al
; CHECK-32: ret
define void @g64xl(i64 inreg %x) nounwind {
%t = and i64 %x, 8
%s = icmp eq i64 %t, 0
br i1 %s, label %yes, label %no
yes:
call void @bar()
ret void
no:
ret void
}
; CHECK-64: g32xh:
; CHECK-64: testb $8, %ah
; CHECK-64: ret
; CHECK-32: g32xh:
; CHECK-32: testb $8, %ah
; CHECK-32: ret
define void @g32xh(i32 inreg %x) nounwind {
%t = and i32 %x, 2048
%s = icmp eq i32 %t, 0
br i1 %s, label %yes, label %no
yes:
call void @bar()
ret void
no:
ret void
}
; CHECK-64: g32xl:
; CHECK-64: testb $8, %dil
; CHECK-64: ret
; CHECK-32: g32xl:
; CHECK-32: testb $8, %al
; CHECK-32: ret
define void @g32xl(i32 inreg %x) nounwind {
%t = and i32 %x, 8
%s = icmp eq i32 %t, 0
br i1 %s, label %yes, label %no
yes:
call void @bar()
ret void
no:
ret void
}
; CHECK-64: g16xh:
; CHECK-64: testb $8, %ah
; CHECK-64: ret
; CHECK-32: g16xh:
; CHECK-32: testb $8, %ah
; CHECK-32: ret
define void @g16xh(i16 inreg %x) nounwind {
%t = and i16 %x, 2048
%s = icmp eq i16 %t, 0
br i1 %s, label %yes, label %no
yes:
call void @bar()
ret void
no:
ret void
}
; CHECK-64: g16xl:
; CHECK-64: testb $8, %dil
; CHECK-64: ret
; CHECK-32: g16xl:
; CHECK-32: testb $8, %al
; CHECK-32: ret
define void @g16xl(i16 inreg %x) nounwind {
%t = and i16 %x, 8
%s = icmp eq i16 %t, 0
br i1 %s, label %yes, label %no
yes:
call void @bar()
ret void
no:
ret void
}
; CHECK-64: g64x16:
change selectiondag to add the sign extended versions of immediate operands to instructions instead of zero extended ones. This makes the asmprinter print signed values more consistently. This apparently only really affects the X86 backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81265 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-08 23:05:44 +00:00
; CHECK-64: testw $-32640, %di
Add an x86 peep that narrows TEST instructions to forms that use a smaller encoding. These kinds of patterns are very frequent in sqlite3, for example. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79439 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-19 18:16:17 +00:00
; CHECK-64: ret
; CHECK-32: g64x16:
change selectiondag to add the sign extended versions of immediate operands to instructions instead of zero extended ones. This makes the asmprinter print signed values more consistently. This apparently only really affects the X86 backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81265 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-08 23:05:44 +00:00
; CHECK-32: testw $-32640, %ax
Add an x86 peep that narrows TEST instructions to forms that use a smaller encoding. These kinds of patterns are very frequent in sqlite3, for example. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79439 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-19 18:16:17 +00:00
; CHECK-32: ret
define void @g64x16(i64 inreg %x) nounwind {
%t = and i64 %x, 32896
%s = icmp eq i64 %t, 0
br i1 %s, label %yes, label %no
yes:
call void @bar()
ret void
no:
ret void
}
; CHECK-64: g32x16:
change selectiondag to add the sign extended versions of immediate operands to instructions instead of zero extended ones. This makes the asmprinter print signed values more consistently. This apparently only really affects the X86 backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81265 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-08 23:05:44 +00:00
; CHECK-64: testw $-32640, %di
Add an x86 peep that narrows TEST instructions to forms that use a smaller encoding. These kinds of patterns are very frequent in sqlite3, for example. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79439 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-19 18:16:17 +00:00
; CHECK-64: ret
; CHECK-32: g32x16:
change selectiondag to add the sign extended versions of immediate operands to instructions instead of zero extended ones. This makes the asmprinter print signed values more consistently. This apparently only really affects the X86 backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81265 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-08 23:05:44 +00:00
; CHECK-32: testw $-32640, %ax
Add an x86 peep that narrows TEST instructions to forms that use a smaller encoding. These kinds of patterns are very frequent in sqlite3, for example. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79439 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-19 18:16:17 +00:00
; CHECK-32: ret
define void @g32x16(i32 inreg %x) nounwind {
%t = and i32 %x, 32896
%s = icmp eq i32 %t, 0
br i1 %s, label %yes, label %no
yes:
call void @bar()
ret void
no:
ret void
}
; CHECK-64: g64x32:
; CHECK-64: testl $268468352, %edi
; CHECK-64: ret
; CHECK-32: g64x32:
; CHECK-32: testl $268468352, %eax
; CHECK-32: ret
define void @g64x32(i64 inreg %x) nounwind {
%t = and i64 %x, 268468352
%s = icmp eq i64 %t, 0
br i1 %s, label %yes, label %no
yes:
call void @bar()
ret void
no:
ret void
}
declare void @bar()
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