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llvm-6502/test/CodeGen/X86/mmx-bitcast.ll

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[X86][MMX] Cleanup shuffle, bitcast and insert element tests - Merge MMX arg passing test files - Merge MMX bitcast, insert elt and shuffle tests git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227867 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 21:56:11 +00:00
; RUN: llc < %s -mtriple=x86_64-darwin -mattr=+mmx,+sse2 | FileCheck %s
define i64 @t0(x86_mmx* %p) {
; CHECK-LABEL: t0:
; CHECK: ## BB#0:
; CHECK-NEXT: movq
; CHECK-NEXT: paddq %mm0, %mm0
; CHECK-NEXT: movd %mm0, %rax
; CHECK-NEXT: retq
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00
%t = load x86_mmx, x86_mmx* %p
[X86][MMX] Cleanup shuffle, bitcast and insert element tests - Merge MMX arg passing test files - Merge MMX bitcast, insert elt and shuffle tests git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227867 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 21:56:11 +00:00
%u = tail call x86_mmx @llvm.x86.mmx.padd.q(x86_mmx %t, x86_mmx %t)
%s = bitcast x86_mmx %u to i64
ret i64 %s
}
define i64 @t1(x86_mmx* %p) {
; CHECK-LABEL: t1:
; CHECK: ## BB#0:
; CHECK-NEXT: movq
; CHECK-NEXT: paddd %mm0, %mm0
; CHECK-NEXT: movd %mm0, %rax
; CHECK-NEXT: retq
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00
%t = load x86_mmx, x86_mmx* %p
[X86][MMX] Cleanup shuffle, bitcast and insert element tests - Merge MMX arg passing test files - Merge MMX bitcast, insert elt and shuffle tests git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227867 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 21:56:11 +00:00
%u = tail call x86_mmx @llvm.x86.mmx.padd.d(x86_mmx %t, x86_mmx %t)
%s = bitcast x86_mmx %u to i64
ret i64 %s
}
define i64 @t2(x86_mmx* %p) {
; CHECK-LABEL: t2:
; CHECK: ## BB#0:
; CHECK-NEXT: movq
; CHECK-NEXT: paddw %mm0, %mm0
; CHECK-NEXT: movd %mm0, %rax
; CHECK-NEXT: retq
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00
%t = load x86_mmx, x86_mmx* %p
[X86][MMX] Cleanup shuffle, bitcast and insert element tests - Merge MMX arg passing test files - Merge MMX bitcast, insert elt and shuffle tests git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227867 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 21:56:11 +00:00
%u = tail call x86_mmx @llvm.x86.mmx.padd.w(x86_mmx %t, x86_mmx %t)
%s = bitcast x86_mmx %u to i64
ret i64 %s
}
define i64 @t3(x86_mmx* %p) {
; CHECK-LABEL: t3:
; CHECK: ## BB#0:
; CHECK-NEXT: movq
; CHECK-NEXT: paddb %mm0, %mm0
; CHECK-NEXT: movd %mm0, %rax
; CHECK-NEXT: retq
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00
%t = load x86_mmx, x86_mmx* %p
[X86][MMX] Cleanup shuffle, bitcast and insert element tests - Merge MMX arg passing test files - Merge MMX bitcast, insert elt and shuffle tests git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227867 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 21:56:11 +00:00
%u = tail call x86_mmx @llvm.x86.mmx.padd.b(x86_mmx %t, x86_mmx %t)
%s = bitcast x86_mmx %u to i64
ret i64 %s
}
@R = external global x86_mmx
define void @t4(<1 x i64> %A, <1 x i64> %B) {
; CHECK-LABEL: t4:
; CHECK: ## BB#0: ## %entry
; CHECK-NEXT: movd
; CHECK-NEXT: movd
; CHECK: retq
entry:
%tmp2 = bitcast <1 x i64> %A to x86_mmx
%tmp3 = bitcast <1 x i64> %B to x86_mmx
%tmp7 = tail call x86_mmx @llvm.x86.mmx.paddus.w(x86_mmx %tmp2, x86_mmx %tmp3)
store x86_mmx %tmp7, x86_mmx* @R
tail call void @llvm.x86.mmx.emms()
ret void
}
define i64 @t5(i32 %a, i32 %b) nounwind readnone {
; CHECK-LABEL: t5:
; CHECK: ## BB#0:
; CHECK-NEXT: movd
; CHECK-NEXT: movd
; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,1,1,3]
; CHECK-NEXT: movd %xmm0, %rax
; CHECK-NEXT: retq
%v0 = insertelement <2 x i32> undef, i32 %a, i32 0
%v1 = insertelement <2 x i32> %v0, i32 %b, i32 1
%conv = bitcast <2 x i32> %v1 to i64
ret i64 %conv
}
declare x86_mmx @llvm.x86.mmx.pslli.q(x86_mmx, i32)
define <1 x i64> @t6(i64 %t) {
; CHECK-LABEL: t6:
; CHECK: ## BB#0:
; CHECK-NEXT: movd
; CHECK-NEXT: psllq $48, %mm0
; CHECK-NEXT: movd %mm0, %rax
; CHECK-NEXT: retq
%t1 = insertelement <1 x i64> undef, i64 %t, i32 0
%t0 = bitcast <1 x i64> %t1 to x86_mmx
%t2 = tail call x86_mmx @llvm.x86.mmx.pslli.q(x86_mmx %t0, i32 48)
%t3 = bitcast x86_mmx %t2 to <1 x i64>
ret <1 x i64> %t3
}
declare x86_mmx @llvm.x86.mmx.paddus.w(x86_mmx, x86_mmx)
declare x86_mmx @llvm.x86.mmx.padd.b(x86_mmx, x86_mmx)
declare x86_mmx @llvm.x86.mmx.padd.w(x86_mmx, x86_mmx)
declare x86_mmx @llvm.x86.mmx.padd.d(x86_mmx, x86_mmx)
declare x86_mmx @llvm.x86.mmx.padd.q(x86_mmx, x86_mmx)
declare void @llvm.x86.mmx.emms()
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