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llvm-6502/test/MC/Mips/micromips32r6/valid.s

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[mips][microMIPSr6] Implement BALC and BC instructions This patch implements BALC and BC instructions using mapping. Differential Revision: http://reviews.llvm.org/D8388 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235302 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-20 13:04:14 +00:00
# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 -mattr=micromips | FileCheck %s
.set noat
[mips][microMIPSr6] Implement ADD, ADDU and ADDIU instructions Differential Revision: http://reviews.llvm.org/D8704 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236111 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-29 15:11:07 +00:00
add $3, $4, $5 # CHECK: add $3, $4, $5 # encoding: [0x00,0xa4,0x19,0x10]
addiu $3, $4, 1234 # CHECK: addiu $3, $4, 1234 # encoding: [0x30,0x64,0x04,0xd2]
addu $3, $4, $5 # CHECK: addu $3, $4, $5 # encoding: [0x00,0xa4,0x19,0x50]
[mips][microMIPSr6] Implement ADDIUPC and LWPC instructions This patch implements ADDIUPC and LWPC instructions using mapping. Differential Revision: http://reviews.llvm.org/D8415 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236852 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-08 13:52:04 +00:00
addiupc $4, 100 # CHECK: addiupc $4, 100 # encoding: [0x78,0x80,0x00,0x19]
[mips][microMIPSr6] Implement ALUIPC and AUIPC instructions This patch implements ALUIPC and AUIPC instructions using mapping. Differential Revision: http://reviews.llvm.org/D8441 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236858 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-08 14:25:11 +00:00
aluipc $3, 56 # CHECK: aluipc $3, 56 # encoding: [0x78,0x7f,0x00,0x38]
auipc $3, -1 # CHECK: auipc $3, -1 # encoding: [0x78,0x7e,0xff,0xff]
[mips][microMIPSr6] Implement BALC and BC instructions This patch implements BALC and BC instructions using mapping. Differential Revision: http://reviews.llvm.org/D8388 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235302 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-20 13:04:14 +00:00
balc 14572256 # CHECK: balc 14572256 # encoding: [0xb4,0x37,0x96,0xb8]
bc 14572256 # CHECK: bc 14572256 # encoding: [0x94,0x37,0x96,0xb8]
[mips][microMIPSr6] Implement BITSWAP instruction Implement BITSWAP instruction using mapping. Differential Revision: http://reviews.llvm.org/D8857 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235321 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-20 18:14:59 +00:00
bitswap $4, $2 # CHECK: bitswap $4, $2 # encoding: [0x00,0x44,0x0b,0x3c]
[mips][microMIPSr6] Implement CACHE and PREF instructions Implement CACHE and PREF instructions using mapping. Differential Revision: http://reviews.llvm.org/D8893 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235379 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-21 11:17:25 +00:00
cache 1, 8($5) # CHECK: cache 1, 8($5) # encoding: [0x20,0x25,0x60,0x08]
[mips][microMIPSr6] Implement JIALC and JIC instructions This patch implements JIALC and JIC instructions using mapping. Differential Revision: http://reviews.llvm.org/D8389 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236748 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-07 17:12:23 +00:00
jialc $5, 256 # CHECK: jialc $5, 256 # encoding: [0x80,0x05,0x01,0x00]
jic $5, 256 # CHECK: jic $5, 256 # encoding: [0xa0,0x05,0x01,0x00]
[mips][microMIPSr6] Implement ADDIUPC and LWPC instructions This patch implements ADDIUPC and LWPC instructions using mapping. Differential Revision: http://reviews.llvm.org/D8415 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236852 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-08 13:52:04 +00:00
lwpc $2,268 # CHECK: lwpc $2, 268 # encoding: [0x78,0x48,0x00,0x43]
[mips][microMIPSr6] Implement MUL, MUH, MULU and MUHU instructions Differential Revision: http://reviews.llvm.org/D8894 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236131 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-29 17:23:22 +00:00
mul $3, $4, $5 # CHECK mul $3, $4, $5 # encoding: [0x00,0xa4,0x18,0x18]
muh $3, $4, $5 # CHECK muh $3, $4, $5 # encoding: [0x00,0xa4,0x18,0x58]
mulu $3, $4, $5 # CHECK mulu $3, $4, $5 # encoding: [0x00,0xa4,0x18,0x98]
muhu $3, $4, $5 # CHECK muhu $3, $4, $5 # encoding: [0x00,0xa4,0x18,0xd8]
[mips][microMIPSr6] Implement CACHE and PREF instructions Implement CACHE and PREF instructions using mapping. Differential Revision: http://reviews.llvm.org/D8893 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235379 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-21 11:17:25 +00:00
pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0x60,0x25,0x20,0x08]
[mips][microMIPSr6] Implement SELEQZ and SELNEZ instructions This patch implements SELEQZ and SELNEZ instructions using mapping. Differential Revision: http://reviews.llvm.org/D8497 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237158 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-12 17:39:32 +00:00
seleqz $2,$3,$4 # CHECK: seleqz $2, $3, $4 # encoding: [0x00,0x83,0x11,0x40]
selnez $2,$3,$4 # CHECK: selnez $2, $3, $4 # encoding: [0x00,0x83,0x11,0x80]
[mips][microMIPSr6] Implement SUB and SUBU instructions Differential Revision: http://reviews.llvm.org/D8764 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236118 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-29 16:22:46 +00:00
sub $3, $4, $5 # CHECK: sub $3, $4, $5 # encoding: [0x00,0xa4,0x19,0x90]
subu $3, $4, $5 # CHECK: subu $3, $4, $5 # encoding: [0x00,0xa4,0x19,0xd0]
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