llvm-6502/test/CodeGen/X86/mmx-insert-element.ll

; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | grep movq
; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | grep pshufd
; This is not an MMX operation; promoted to XMM.

define x86_mmx @qux(i32 %A) nounwind {
	%tmp3 = insertelement <2 x i32> < i32 0, i32 undef >, i32 %A, i32 1		; <<2 x i32>> [#uses=1]
        %tmp4 = bitcast <2 x i32> %tmp3 to x86_mmx
	ret x86_mmx %tmp4
}
Mark all these as needing SSE2. Should fix PPC and maybe even Linux. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115291 91177308-0d34-0410-b5e6-96231b3b80d8 2010-10-01 04:17:55 +00:00			`; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 \| grep movq`
			`; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 \| grep pshufd`
Massive rewrite of MMX: The x86_mmx type is used for MMX intrinsics, parameters and return values where these use MMX registers, and is also supported in load, store, and bitcast. Only the above operations generate MMX instructions, and optimizations do not operate on or produce MMX intrinsics. MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into smaller pieces. Optimizations may occur on these forms and the result casted back to x86_mmx, provided the result feeds into a previous existing x86_mmx operation. The point of all this is prevent optimizations from introducing MMX operations, which is unsafe due to the EMMS problem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115243 91177308-0d34-0410-b5e6-96231b3b80d8 2010-09-30 23:57:10 +00:00			`; This is not an MMX operation; promoted to XMM.`
Testcases for MMX. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36408 91177308-0d34-0410-b5e6-96231b3b80d8 2007-04-24 22:28:30 +00:00
Massive rewrite of MMX: The x86_mmx type is used for MMX intrinsics, parameters and return values where these use MMX registers, and is also supported in load, store, and bitcast. Only the above operations generate MMX instructions, and optimizations do not operate on or produce MMX intrinsics. MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into smaller pieces. Optimizations may occur on these forms and the result casted back to x86_mmx, provided the result feeds into a previous existing x86_mmx operation. The point of all this is prevent optimizations from introducing MMX operations, which is unsafe due to the EMMS problem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115243 91177308-0d34-0410-b5e6-96231b3b80d8 2010-09-30 23:57:10 +00:00			`define x86_mmx @qux(i32 %A) nounwind {`
Testcases for MMX. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36408 91177308-0d34-0410-b5e6-96231b3b80d8 2007-04-24 22:28:30 +00:00			`%tmp3 = insertelement <2 x i32> < i32 0, i32 undef >, i32 %A, i32 1 ; <<2 x i32>> [#uses=1]`
Massive rewrite of MMX: The x86_mmx type is used for MMX intrinsics, parameters and return values where these use MMX registers, and is also supported in load, store, and bitcast. Only the above operations generate MMX instructions, and optimizations do not operate on or produce MMX intrinsics. MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into smaller pieces. Optimizations may occur on these forms and the result casted back to x86_mmx, provided the result feeds into a previous existing x86_mmx operation. The point of all this is prevent optimizations from introducing MMX operations, which is unsafe due to the EMMS problem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115243 91177308-0d34-0410-b5e6-96231b3b80d8 2010-09-30 23:57:10 +00:00			`%tmp4 = bitcast <2 x i32> %tmp3 to x86_mmx`
			`ret x86_mmx %tmp4`
Testcases for MMX. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36408 91177308-0d34-0410-b5e6-96231b3b80d8 2007-04-24 22:28:30 +00:00			`}`