mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-28 19:31:58 +00:00
298 lines
9.4 KiB
LLVM
298 lines
9.4 KiB
LLVM
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; RUN: llc < %s -march=x86 -mattr=+3dnow | FileCheck %s
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define <8 x i8> @test_pavgusb(x86_mmx %a.coerce, x86_mmx %b.coerce) nounwind readnone {
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; CHECK: pavgusb
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entry:
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%0 = bitcast x86_mmx %a.coerce to <8 x i8>
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%1 = bitcast x86_mmx %b.coerce to <8 x i8>
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%2 = bitcast <8 x i8> %0 to x86_mmx
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%3 = bitcast <8 x i8> %1 to x86_mmx
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%4 = call x86_mmx @llvm.x86.3dnow.pavgusb(x86_mmx %2, x86_mmx %3)
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%5 = bitcast x86_mmx %4 to <8 x i8>
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ret <8 x i8> %5
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}
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declare x86_mmx @llvm.x86.3dnow.pavgusb(x86_mmx, x86_mmx) nounwind readnone
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define <2 x i32> @test_pf2id(<2 x float> %a) nounwind readnone {
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; CHECK: pf2id
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entry:
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%0 = bitcast <2 x float> %a to x86_mmx
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%1 = tail call x86_mmx @llvm.x86.3dnow.pf2id(x86_mmx %0)
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%2 = bitcast x86_mmx %1 to <2 x i32>
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ret <2 x i32> %2
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}
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declare x86_mmx @llvm.x86.3dnow.pf2id(x86_mmx) nounwind readnone
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define <2 x float> @test_pfacc(<2 x float> %a, <2 x float> %b) nounwind readnone {
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; CHECK: pfacc
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entry:
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%0 = bitcast <2 x float> %a to x86_mmx
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%1 = bitcast <2 x float> %b to x86_mmx
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%2 = tail call x86_mmx @llvm.x86.3dnow.pfacc(x86_mmx %0, x86_mmx %1)
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%3 = bitcast x86_mmx %2 to <2 x float>
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ret <2 x float> %3
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}
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declare x86_mmx @llvm.x86.3dnow.pfacc(x86_mmx, x86_mmx) nounwind readnone
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define <2 x float> @test_pfadd(<2 x float> %a, <2 x float> %b) nounwind readnone {
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; CHECK: pfadd
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entry:
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%0 = bitcast <2 x float> %a to x86_mmx
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%1 = bitcast <2 x float> %b to x86_mmx
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%2 = tail call x86_mmx @llvm.x86.3dnow.pfadd(x86_mmx %0, x86_mmx %1)
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%3 = bitcast x86_mmx %2 to <2 x float>
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ret <2 x float> %3
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}
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declare x86_mmx @llvm.x86.3dnow.pfadd(x86_mmx, x86_mmx) nounwind readnone
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define <2 x i32> @test_pfcmpeq(<2 x float> %a, <2 x float> %b) nounwind readnone {
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; CHECK: pfcmpeq
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entry:
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%0 = bitcast <2 x float> %a to x86_mmx
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%1 = bitcast <2 x float> %b to x86_mmx
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%2 = tail call x86_mmx @llvm.x86.3dnow.pfcmpeq(x86_mmx %0, x86_mmx %1)
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%3 = bitcast x86_mmx %2 to <2 x i32>
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ret <2 x i32> %3
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}
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declare x86_mmx @llvm.x86.3dnow.pfcmpeq(x86_mmx, x86_mmx) nounwind readnone
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define <2 x i32> @test_pfcmpge(<2 x float> %a, <2 x float> %b) nounwind readnone {
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; CHECK: pfcmpge
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entry:
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%0 = bitcast <2 x float> %a to x86_mmx
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%1 = bitcast <2 x float> %b to x86_mmx
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%2 = tail call x86_mmx @llvm.x86.3dnow.pfcmpge(x86_mmx %0, x86_mmx %1)
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%3 = bitcast x86_mmx %2 to <2 x i32>
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ret <2 x i32> %3
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}
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declare x86_mmx @llvm.x86.3dnow.pfcmpge(x86_mmx, x86_mmx) nounwind readnone
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define <2 x i32> @test_pfcmpgt(<2 x float> %a, <2 x float> %b) nounwind readnone {
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; CHECK: pfcmpgt
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entry:
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%0 = bitcast <2 x float> %a to x86_mmx
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%1 = bitcast <2 x float> %b to x86_mmx
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%2 = tail call x86_mmx @llvm.x86.3dnow.pfcmpgt(x86_mmx %0, x86_mmx %1)
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%3 = bitcast x86_mmx %2 to <2 x i32>
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ret <2 x i32> %3
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}
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declare x86_mmx @llvm.x86.3dnow.pfcmpgt(x86_mmx, x86_mmx) nounwind readnone
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define <2 x float> @test_pfmax(<2 x float> %a, <2 x float> %b) nounwind readnone {
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; CHECK: pfmax
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entry:
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%0 = bitcast <2 x float> %a to x86_mmx
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%1 = bitcast <2 x float> %b to x86_mmx
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%2 = tail call x86_mmx @llvm.x86.3dnow.pfmax(x86_mmx %0, x86_mmx %1)
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%3 = bitcast x86_mmx %2 to <2 x float>
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ret <2 x float> %3
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}
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declare x86_mmx @llvm.x86.3dnow.pfmax(x86_mmx, x86_mmx) nounwind readnone
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define <2 x float> @test_pfmin(<2 x float> %a, <2 x float> %b) nounwind readnone {
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; CHECK: pfmin
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entry:
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%0 = bitcast <2 x float> %a to x86_mmx
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%1 = bitcast <2 x float> %b to x86_mmx
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%2 = tail call x86_mmx @llvm.x86.3dnow.pfmin(x86_mmx %0, x86_mmx %1)
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%3 = bitcast x86_mmx %2 to <2 x float>
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ret <2 x float> %3
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}
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declare x86_mmx @llvm.x86.3dnow.pfmin(x86_mmx, x86_mmx) nounwind readnone
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define <2 x float> @test_pfmul(<2 x float> %a, <2 x float> %b) nounwind readnone {
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; CHECK: pfmul
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entry:
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%0 = bitcast <2 x float> %a to x86_mmx
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%1 = bitcast <2 x float> %b to x86_mmx
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%2 = tail call x86_mmx @llvm.x86.3dnow.pfmul(x86_mmx %0, x86_mmx %1)
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%3 = bitcast x86_mmx %2 to <2 x float>
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ret <2 x float> %3
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}
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declare x86_mmx @llvm.x86.3dnow.pfmul(x86_mmx, x86_mmx) nounwind readnone
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define <2 x float> @test_pfrcp(<2 x float> %a) nounwind readnone {
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; CHECK: pfrcp
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entry:
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%0 = bitcast <2 x float> %a to x86_mmx
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%1 = tail call x86_mmx @llvm.x86.3dnow.pfrcp(x86_mmx %0)
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%2 = bitcast x86_mmx %1 to <2 x float>
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ret <2 x float> %2
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}
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declare x86_mmx @llvm.x86.3dnow.pfrcp(x86_mmx) nounwind readnone
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define <2 x float> @test_pfrcpit1(<2 x float> %a, <2 x float> %b) nounwind readnone {
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; CHECK: pfrcpit1
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entry:
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%0 = bitcast <2 x float> %a to x86_mmx
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%1 = bitcast <2 x float> %b to x86_mmx
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%2 = tail call x86_mmx @llvm.x86.3dnow.pfrcpit1(x86_mmx %0, x86_mmx %1)
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%3 = bitcast x86_mmx %2 to <2 x float>
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ret <2 x float> %3
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}
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declare x86_mmx @llvm.x86.3dnow.pfrcpit1(x86_mmx, x86_mmx) nounwind readnone
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define <2 x float> @test_pfrcpit2(<2 x float> %a, <2 x float> %b) nounwind readnone {
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; CHECK: pfrcpit2
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entry:
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%0 = bitcast <2 x float> %a to x86_mmx
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%1 = bitcast <2 x float> %b to x86_mmx
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%2 = tail call x86_mmx @llvm.x86.3dnow.pfrcpit2(x86_mmx %0, x86_mmx %1)
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%3 = bitcast x86_mmx %2 to <2 x float>
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ret <2 x float> %3
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}
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declare x86_mmx @llvm.x86.3dnow.pfrcpit2(x86_mmx, x86_mmx) nounwind readnone
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define <2 x float> @test_pfrsqrt(<2 x float> %a) nounwind readnone {
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; CHECK: pfrsqrt
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entry:
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%0 = bitcast <2 x float> %a to x86_mmx
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%1 = tail call x86_mmx @llvm.x86.3dnow.pfrsqrt(x86_mmx %0)
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%2 = bitcast x86_mmx %1 to <2 x float>
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ret <2 x float> %2
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}
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declare x86_mmx @llvm.x86.3dnow.pfrsqrt(x86_mmx) nounwind readnone
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define <2 x float> @test_pfrsqit1(<2 x float> %a, <2 x float> %b) nounwind readnone {
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; CHECK: pfrsqit1
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entry:
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%0 = bitcast <2 x float> %a to x86_mmx
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%1 = bitcast <2 x float> %b to x86_mmx
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%2 = tail call x86_mmx @llvm.x86.3dnow.pfrsqit1(x86_mmx %0, x86_mmx %1)
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%3 = bitcast x86_mmx %2 to <2 x float>
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ret <2 x float> %3
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}
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declare x86_mmx @llvm.x86.3dnow.pfrsqit1(x86_mmx, x86_mmx) nounwind readnone
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define <2 x float> @test_pfsub(<2 x float> %a, <2 x float> %b) nounwind readnone {
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; CHECK: pfsub
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entry:
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%0 = bitcast <2 x float> %a to x86_mmx
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%1 = bitcast <2 x float> %b to x86_mmx
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%2 = tail call x86_mmx @llvm.x86.3dnow.pfsub(x86_mmx %0, x86_mmx %1)
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%3 = bitcast x86_mmx %2 to <2 x float>
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ret <2 x float> %3
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}
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declare x86_mmx @llvm.x86.3dnow.pfsub(x86_mmx, x86_mmx) nounwind readnone
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define <2 x float> @test_pfsubr(<2 x float> %a, <2 x float> %b) nounwind readnone {
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; CHECK: pfsubr
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entry:
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%0 = bitcast <2 x float> %a to x86_mmx
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%1 = bitcast <2 x float> %b to x86_mmx
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%2 = tail call x86_mmx @llvm.x86.3dnow.pfsubr(x86_mmx %0, x86_mmx %1)
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%3 = bitcast x86_mmx %2 to <2 x float>
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ret <2 x float> %3
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}
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declare x86_mmx @llvm.x86.3dnow.pfsubr(x86_mmx, x86_mmx) nounwind readnone
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define <2 x float> @test_pi2fd(x86_mmx %a.coerce) nounwind readnone {
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; CHECK: pi2fd
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entry:
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%0 = bitcast x86_mmx %a.coerce to <2 x i32>
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%1 = bitcast <2 x i32> %0 to x86_mmx
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%2 = call x86_mmx @llvm.x86.3dnow.pi2fd(x86_mmx %1)
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%3 = bitcast x86_mmx %2 to <2 x float>
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ret <2 x float> %3
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}
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declare x86_mmx @llvm.x86.3dnow.pi2fd(x86_mmx) nounwind readnone
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define <4 x i16> @test_pmulhrw(x86_mmx %a.coerce, x86_mmx %b.coerce) nounwind readnone {
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; CHECK: pmulhrw
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entry:
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%0 = bitcast x86_mmx %a.coerce to <4 x i16>
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%1 = bitcast x86_mmx %b.coerce to <4 x i16>
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%2 = bitcast <4 x i16> %0 to x86_mmx
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%3 = bitcast <4 x i16> %1 to x86_mmx
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%4 = call x86_mmx @llvm.x86.3dnow.pmulhrw(x86_mmx %2, x86_mmx %3)
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%5 = bitcast x86_mmx %4 to <4 x i16>
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ret <4 x i16> %5
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}
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declare x86_mmx @llvm.x86.3dnow.pmulhrw(x86_mmx, x86_mmx) nounwind readnone
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define <2 x i32> @test_pf2iw(<2 x float> %a) nounwind readnone {
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; CHECK: pf2iw
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entry:
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%0 = bitcast <2 x float> %a to x86_mmx
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%1 = tail call x86_mmx @llvm.x86.3dnowa.pf2iw(x86_mmx %0)
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%2 = bitcast x86_mmx %1 to <2 x i32>
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ret <2 x i32> %2
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}
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declare x86_mmx @llvm.x86.3dnowa.pf2iw(x86_mmx) nounwind readnone
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define <2 x float> @test_pfnacc(<2 x float> %a, <2 x float> %b) nounwind readnone {
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; CHECK: pfnacc
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entry:
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%0 = bitcast <2 x float> %a to x86_mmx
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%1 = bitcast <2 x float> %b to x86_mmx
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%2 = tail call x86_mmx @llvm.x86.3dnowa.pfnacc(x86_mmx %0, x86_mmx %1)
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%3 = bitcast x86_mmx %2 to <2 x float>
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ret <2 x float> %3
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}
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declare x86_mmx @llvm.x86.3dnowa.pfnacc(x86_mmx, x86_mmx) nounwind readnone
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define <2 x float> @test_pfpnacc(<2 x float> %a, <2 x float> %b) nounwind readnone {
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; CHECK: pfpnacc
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entry:
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%0 = bitcast <2 x float> %a to x86_mmx
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%1 = bitcast <2 x float> %b to x86_mmx
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%2 = tail call x86_mmx @llvm.x86.3dnowa.pfpnacc(x86_mmx %0, x86_mmx %1)
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%3 = bitcast x86_mmx %2 to <2 x float>
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ret <2 x float> %3
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}
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declare x86_mmx @llvm.x86.3dnowa.pfpnacc(x86_mmx, x86_mmx) nounwind readnone
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define <2 x float> @test_pi2fw(x86_mmx %a.coerce) nounwind readnone {
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; CHECK: pi2fw
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entry:
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%0 = bitcast x86_mmx %a.coerce to <2 x i32>
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%1 = bitcast <2 x i32> %0 to x86_mmx
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%2 = call x86_mmx @llvm.x86.3dnowa.pi2fw(x86_mmx %1)
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%3 = bitcast x86_mmx %2 to <2 x float>
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ret <2 x float> %3
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}
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declare x86_mmx @llvm.x86.3dnowa.pi2fw(x86_mmx) nounwind readnone
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define <2 x float> @test_pswapdsf(<2 x float> %a) nounwind readnone {
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; CHECK: pswapd
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entry:
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%0 = bitcast <2 x float> %a to x86_mmx
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%1 = tail call x86_mmx @llvm.x86.3dnowa.pswapd(x86_mmx %0)
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%2 = bitcast x86_mmx %1 to <2 x float>
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ret <2 x float> %2
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}
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define <2 x i32> @test_pswapdsi(<2 x i32> %a) nounwind readnone {
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; CHECK: pswapd
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entry:
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%0 = bitcast <2 x i32> %a to x86_mmx
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%1 = tail call x86_mmx @llvm.x86.3dnowa.pswapd(x86_mmx %0)
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%2 = bitcast x86_mmx %1 to <2 x i32>
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ret <2 x i32> %2
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}
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declare x86_mmx @llvm.x86.3dnowa.pswapd(x86_mmx) nounwind readnone
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