2013-06-20 21:55:30 +00:00
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; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
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2013-10-10 17:11:46 +00:00
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; RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s
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2012-12-11 21:25:42 +00:00
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2013-10-11 21:03:41 +00:00
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;EG-CHECK-LABEL: @test1:
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;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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;SI-CHECK-LABEL: @test1:
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;SI-CHECK: V_ADD_I32_e32 [[REG:VGPR[0-9]+]], {{VGPR[0-9]+, VGPR[0-9]+}}
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;SI-CHECK-NOT: [[REG]]
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;SI-CHECK: BUFFER_STORE_DWORD [[REG]],
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define void @test1(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
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%b_ptr = getelementptr i32 addrspace(1)* %in, i32 1
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%a = load i32 addrspace(1)* %in
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%b = load i32 addrspace(1)* %b_ptr
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%result = add i32 %a, %b
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store i32 %result, i32 addrspace(1)* %out
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ret void
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}
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2013-10-11 21:03:39 +00:00
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;EG-CHECK-LABEL: @test2:
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2013-07-23 01:48:18 +00:00
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;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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2012-12-11 21:25:42 +00:00
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2013-10-11 21:03:39 +00:00
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;SI-CHECK-LABEL: @test2:
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2013-06-20 21:55:30 +00:00
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;SI-CHECK: V_ADD_I32_e32 VGPR{{[0-9]+, VGPR[0-9]+, VGPR[0-9]+}}
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;SI-CHECK: V_ADD_I32_e32 VGPR{{[0-9]+, VGPR[0-9]+, VGPR[0-9]+}}
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define void @test2(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
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%b_ptr = getelementptr <2 x i32> addrspace(1)* %in, i32 1
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2013-10-11 21:03:39 +00:00
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%a = load <2 x i32> addrspace(1)* %in
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%b = load <2 x i32> addrspace(1)* %b_ptr
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2013-06-20 21:55:30 +00:00
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%result = add <2 x i32> %a, %b
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store <2 x i32> %result, <2 x i32> addrspace(1)* %out
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ret void
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}
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2013-10-11 21:03:39 +00:00
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;EG-CHECK-LABEL: @test4:
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2013-07-23 01:48:18 +00:00
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;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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2013-06-20 21:55:30 +00:00
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2013-10-11 21:03:39 +00:00
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;SI-CHECK-LABEL: @test4:
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2013-06-20 21:55:30 +00:00
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;SI-CHECK: V_ADD_I32_e32 VGPR{{[0-9]+, VGPR[0-9]+, VGPR[0-9]+}}
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;SI-CHECK: V_ADD_I32_e32 VGPR{{[0-9]+, VGPR[0-9]+, VGPR[0-9]+}}
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;SI-CHECK: V_ADD_I32_e32 VGPR{{[0-9]+, VGPR[0-9]+, VGPR[0-9]+}}
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;SI-CHECK: V_ADD_I32_e32 VGPR{{[0-9]+, VGPR[0-9]+, VGPR[0-9]+}}
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define void @test4(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
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2012-12-11 21:25:42 +00:00
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%b_ptr = getelementptr <4 x i32> addrspace(1)* %in, i32 1
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2013-10-11 21:03:39 +00:00
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%a = load <4 x i32> addrspace(1)* %in
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%b = load <4 x i32> addrspace(1)* %b_ptr
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2012-12-11 21:25:42 +00:00
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%result = add <4 x i32> %a, %b
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store <4 x i32> %result, <4 x i32> addrspace(1)* %out
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ret void
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}
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